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1. 发明授权

US07713767B2 Method of making circuitized substrate with internal optical pathway using photolithography 失效
标题翻译：使用光刻法制造具有内部光学路径的电路化衬底的方法
公开(公告)号：US07713767B2
公开(公告)日：2010-05-11
申请号：US11907004
申请日：2007-10-09
申请人： Benson Chan , How T. Lin , Roy H. Magnuson , Voya R. Markovich , Mark D. Poliks
发明人： Benson Chan , How T. Lin , Roy H. Magnuson , Voya R. Markovich , Mark D. Poliks
IPC分类号： H01L21/77 , H01L21/00 , G02B6/02 , G02B6/12 , G03G15/00
CPC分类号： G02B6/43 , G02B6/132 , G02B6/136 , H05K1/0274
摘要： A method of making a circuitized substrate (e.g., PCB) including at least one and possibly several internal optical pathways as part thereof such that the resulting substrate will be capable of transmitting and/or receiving both electrical and optical signals. The method involves forming at least one opening between a side of the optical core and an adjacent upstanding member such that the opening is defined by at least one angular sidewall. Light passing through the optical core material (or into the core from above) is reflected off this angular sidewall. The medium (e.g., air) within the opening thus also serves as a reflecting medium due to its own reflective index in comparison to that of the adjacent optical core material. The method utilizes many processes used in conventional PCB manufacturing, thereby keeping costs to a minimum. The formed substrate is capable of being both optically and electrically coupled to one or more other substrates possessing similar capabilities, thereby forming an electro-optical assembly of such substrates.
摘要翻译：一种制造电路化衬底（例如PCB）的方法，其包括至少一个可能的几个内部光学路径作为其一部分，使得所得到的衬底将能够传输和/或接收电信号和光信号。该方法包括在光学核心的一侧和相邻的直立构件之间形成至少一个开口，使得开口由至少一个角形侧壁限定。通过光学芯材料（或从上方进入芯体）的光从该角形侧壁反射。因此，开口内的介质（例如空气）由于其相对于相邻的光学芯材料的反射率而与反射介质一样起作用。该方法利用了常规PCB制造中使用的许多工艺，从而将成本降至最低。所形成的基底能够光学和电耦合到具有相似能力的一个或多个其它基底，从而形成这种基底的电光学组件。

2. 发明申请

US20090173426A1 Multilayered circuitized substrate with p-aramid dielectric layers and method of making same 失效
标题翻译：具有对芳族聚酰胺介电层的多层电路基板及其制造方法
公开(公告)号：US20090173426A1
公开(公告)日：2009-07-09
申请号：US12380617
申请日：2009-03-02
申请人： Robert M. Japp , Voya R. Markovich , Kostas I. Papathomas , Mark D. Poliks
发明人： Robert M. Japp , Voya R. Markovich , Kostas I. Papathomas , Mark D. Poliks
IPC分类号： B32B37/12 , B44C1/22
CPC分类号： H01L23/145 , H01L23/3733 , H01L23/3735 , H01L23/4922 , H01L23/49822 , H01L23/49827 , H01L23/564 , H01L2924/0002 , H01L2924/12044 , H05K1/0366 , H05K1/0373 , H05K3/4602 , H05K3/4626 , H05K3/4652 , H05K3/4655 , H05K3/4688 , H05K2201/0209 , H05K2201/0278 , H05K2201/068 , Y10T29/4913 , Y10T156/10 , H01L2924/00
摘要： A multilayered circuitized substrate including a plurality of dielectric layers each comprised of a p-aramid paper impregnated with a halogen-free, low moisture absorptivity resin including an inorganic filler but not including continuous or semi-continuous fiberglass fibers as part thereof, and a first circuitized layer positioned on a first of the dielectric layers. A method of making this substrate is also provided.
摘要翻译：一种多层电路化基板，包括多个介电层，每个电介质层由浸渍有不含卤素的低吸湿性树脂的对芳族聚酰胺纸构成，所述不含卤素的低吸湿性树脂包括无机填料，但不包括连续或半连续的玻璃纤维作为其一部分，电路层位于第一介电层上。还提供了制造该基板的方法。

3. 发明授权

US07541265B2 Capacitor material for use in circuitized substrates, circuitized substrate utilizing same, method of making said circuitized substrate, and information handling system utilizing said circuitized substrate 有权
标题翻译：用于电路化基板的电容器材料，利用其的电路化基板，制造所述电路化基板的方法和利用所述电路化基板的信息处理系统
公开(公告)号：US07541265B2
公开(公告)日：2009-06-02
申请号：US11031085
申请日：2005-01-10
申请人： Rabindra N. Das , John M. Lauffer , Kostas I. Papathomas , Mark D. Poliks
发明人： Rabindra N. Das , John M. Lauffer , Kostas I. Papathomas , Mark D. Poliks
IPC分类号： H01L21/425
CPC分类号： H05K1/162 , H01L23/49822 , H01L2224/16 , H01L2224/16235 , H01L2224/73253 , H01L2924/00011 , H01L2924/00014 , H01L2924/01012 , H01L2924/01019 , H01L2924/0102 , H01L2924/01078 , H01L2924/01087 , H01L2924/15311 , H01L2924/16195 , H01L2924/3011 , H05K3/0023 , H05K2201/0187 , H05K2201/0209 , H05K2201/0257 , H05K2201/09509 , H05K2201/09718 , H01L2224/0401
摘要： A material for use as part of an internal capacitor within a circuitized substrate includes a polymer (e.g., a cycloaliphatic epoxy or phenoxy based) resin and a quantity of nano-powders of ferroelectric ceramic material (e.g., barium titanate) having a particle size substantially in the range of from about 0.01 microns to about 0.90 microns and a surface area for selected ones of said particles within the range of from about 2.0 to about 20 square meters per gram. A circuitized substrate adapted for using such a material and capacitor therein and a method of making such a substrate are also provided. An electrical assembly (substrate and at least one electrical component) and an information handling system (e.g., personal computer) are also provided.
摘要翻译：用作电路化衬底内的内部电容器的一部分的材料包括聚合物（例如，脂环族环氧基或苯氧基）树脂和一定量的具有大体粒度的铁电陶瓷材料（例如钛酸钡）的纳米粉末在约0.01微米至约0.90微米的范围内，并且所述颗粒中所选颗粒的表面积在约2.0至约20平方米/克的范围内。还提供了适于在其中使用这种材料和电容器的电路化基板和制造这种基板的方法。还提供电气组件（基板和至少一个电气部件）和信息处理系统（例如，个人计算机）。

4. 发明申请

US20080191354A1 Circuitized substrate with p-aramid dielectric layers and method of making same 失效
标题翻译：具有对位芳族聚酰胺介电层的电路基板及其制造方法
公开(公告)号：US20080191354A1
公开(公告)日：2008-08-14
申请号：US12081051
申请日：2008-04-10
申请人： Robert M. Japp , Voya R. Markovich , Kostas I. Papathomas , Mark D. Poliks
发明人： Robert M. Japp , Voya R. Markovich , Kostas I. Papathomas , Mark D. Poliks
IPC分类号： H01L23/50 , H05K3/30
CPC分类号： H01L23/145 , H01L23/3733 , H01L23/3735 , H01L23/4922 , H01L23/49822 , H01L23/49827 , H01L23/564 , H01L2224/16225 , H01L2924/00011 , H01L2924/00014 , H01L2924/12044 , H01L2924/15311 , H05K1/0366 , H05K1/0373 , H05K3/4602 , H05K3/4626 , H05K3/4652 , H05K3/4655 , H05K3/4688 , H05K2201/0209 , H05K2201/0278 , H05K2201/068 , Y10T29/4913 , H01L2224/0401
摘要： A circuitized substrate including a dielectric layer having a p-aramid paper impregnated with a halogen-free, low moisture absorptivity resin and not including continuous or semi-continuous fiberglass fibers as part thereof, and a first circuitized layer positioned on the dielectric layer. A method of making this substrate is also provided.
摘要翻译：一种电路化基板，包括具有浸渍有无卤低吸湿树脂的对芳族聚酰胺纸，并且不包括作为其一部分的连续或半连续玻璃纤维纤维的介电层和位于介电层上的第一电路层。还提供了制造该基板的方法。

5. 发明授权

US06534160B2 Semiconductor device having a thermoset-containing dielectric material and methods for fabricating the same 有权
标题翻译：具有含热固性物质的电介质材料的半导体器件及其制造方法
公开(公告)号：US06534160B2
公开(公告)日：2003-03-18
申请号：US09781637
申请日：2001-02-12
申请人： Donald S. Farquhar , Konstantinos I. Papathomas , Mark D. Poliks
发明人： Donald S. Farquhar , Konstantinos I. Papathomas , Mark D. Poliks
IPC分类号： B32B300
CPC分类号： H05K1/036 , H01L2224/16 , H01L2924/15311 , H05K1/0269 , H05K1/034 , H05K1/0373 , H05K3/386 , H05K2201/0116 , H05K2201/015 , H05K2201/0209 , H05K2203/122 , H05K2203/161 , Y10T428/24917 , Y10T428/249958 , Y10T428/25 , Y10T428/252 , Y10T428/256 , Y10T428/31544
摘要： A semiconductor device having a thermoset-containing, dielectric material and methods for fabricating the same is provided. The device may take the form of a printed circuit board, an integrated circuit chip carrier, or the like. The dielectric material is a non-fibrillated, fluoropolymer matrix that has inorganic particles distributed therein and is impregnated with a thermoset material.
摘要翻译：提供了具有含热固性物质的介电材料的半导体器件及其制造方法。该装置可以采用印刷电路板，集成电路芯片载体等的形式。介电材料是非原纤化的氟聚合物基质，其中分布有无机颗粒并用热固性材料浸渍。

6. 发明授权

US08882983B2 Embedded thin films 有权
标题翻译：嵌入式薄膜
公开(公告)号：US08882983B2
公开(公告)日：2014-11-11
申请号：US12482202
申请日：2009-06-10
申请人： Junghyun Cho , Bahgat Sammakia , Mark D. Poliks , Roy Magnuson , Biplab Kumar Roy
发明人： Junghyun Cho , Bahgat Sammakia , Mark D. Poliks , Roy Magnuson , Biplab Kumar Roy
IPC分类号： C25D9/08 , C25D5/48 , H05K1/16 , H05K3/18
CPC分类号： H05K3/0011 , C25D5/48 , C25D9/08 , C25D21/12 , H05K1/0306 , H05K1/09 , H05K1/162 , H05K1/167 , H05K3/184 , H05K2201/0175 , H05K2201/0355 , H05K2203/092 , H05K2203/135 , H05K2203/163
摘要： A method for forming a film on a conductive substrate, comprising immersing a substrate having a conductive portion in a solution comprising a metal ion ceramic precursor for the film and a peroxide; applying a voltage potential to the conductive portion with respect to a counter electrode in the solution, sufficient to protect the conductive portion from corrosion by the solution, and drive formation of a film on the substrate, controlling a pH of the solution while limiting a production of hydrogen by electrolysis of the solution proximate to the conductive portion; and maintaining the voltage potential for a sufficient duration to produce a film on the conductive portion. An electrode may be formed over the film to produce an electrical device. The film may be, for example, insulating, dielectric, resistive, semiconductive, magnetic, or ferromagnetic.
摘要翻译：一种在导电性基板上形成膜的方法，其特征在于，将具有导电性部分的基板浸渍在包含所述膜的金属离子陶瓷前体和过氧化物的溶液中; 对导电部分相对于溶液中的对电极施加电压电位，足以保护导电部分免受溶液的腐蚀，并且驱动在衬底上形成膜，控制溶液的pH，同时限制生产的氢气通过电解接近导电部分的溶液; 并且保持电压电势足够的持续时间以在导电部分上产生膜。可以在膜上形成电极以产生电气装置。该膜可以是例如绝缘，电介质，电阻，半导体，磁性或铁磁性的。

7. 发明授权

US08685284B2 Conducting paste for device level interconnects 有权
标题翻译：用于器件级互连的导电膏
公开(公告)号：US08685284B2
公开(公告)日：2014-04-01
申请号：US12884657
申请日：2010-09-17
申请人： Rabindra N. Das , Roy H. Magnuson , Mark D. Poliks , Voya R. Markovich
发明人： Rabindra N. Das , Roy H. Magnuson , Mark D. Poliks , Voya R. Markovich
IPC分类号： H01B1/00 , H01B1/22 , H01B1/02
CPC分类号： H01B1/22 , H01L2224/81 , Y10T29/49117
摘要： A conducting paste and method of forming the paste for device level interconnection. The conducting paste contains metal loading in the range 80-95% that is useful for making five micron device level interconnects. The conducting paste is made by mixing two different conducting pastes, each paste maintaining its micro level individual rich region in the mixed paste even after final curing. One paste contains at least one low melting point alloy and the other paste contains noble metal fillers such as gold or silver flakes. In general, average flake size below five micron is suitable for five micron interconnects. However, 1 micron or smaller silver flakes and an LMP mixture is preferred for five micron interconnects. The amount of LMP based paste in the final mixture is preferably 20-50% by weight. The nano micro paste embodiment shows good electrical yield (81%) and low contact resistance.
摘要翻译：导电糊和形成用于器件级互连的糊的方法。导电浆料含有80-95％范围内的金属负载，可用于制造五微米器件级互连。通过混合两种不同的导电浆料制成导电糊料，即使在最终固化后，每个糊料仍将其微量级独立富含区域保持在混合糊料中。一种糊状物含有至少一种低熔点合金，另一种糊状物含有贵金属填料如金或银薄片。通常，小于5微米的平均片尺寸适用于五微米互连。然而，对于5微米互连，优选1微米或更小的银薄片和LMP混合物。最终混合物中基于LMP的糊剂的量优选为20-50重量％。纳米微膏实施例显示良好的电收率（81％）和低接触电阻。

8. 发明授权

US07777136B2 Multi-layered interconnect structure using liquid crystalline polymer dielectric 有权
标题翻译：使用液晶聚合物电介质的多层互连结构
公开(公告)号：US07777136B2
公开(公告)日：2010-08-17
申请号：US11873435
申请日：2007-10-17
申请人： Frank D. Egitto , Donald S. Farquhar , Voya R. Markovich , Mark D. Poliks , Douglas O. Powell
发明人： Frank D. Egitto , Donald S. Farquhar , Voya R. Markovich , Mark D. Poliks , Douglas O. Powell
IPC分类号： H01R12/04 , H05K1/11
CPC分类号： H01L21/4853 , H01L23/3735 , H01L23/49822 , H01L2224/16225 , H01L2924/01004 , H01L2924/01019 , H01L2924/01046 , H01L2924/01068 , H01L2924/01078 , H01L2924/01322 , H01L2924/15311 , H01L2924/3011 , H01L2924/3025 , H05K1/114 , H05K3/429 , H05K3/4602 , H05K3/4608 , H05K3/462 , H05K3/4623 , H05K3/4626 , H05K3/4632 , H05K3/4641 , H05K3/4688 , H05K2201/0141 , H05K2201/0191 , H05K2201/068 , H05K2201/09509 , H05K2201/09536 , H05K2201/09554 , H05K2201/0959 , H05K2201/096 , H05K2201/10378 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165 , Y10T156/1092
摘要： A multi-layered interconnect structure and method of formation. In a first embodiment, first and second liquid crystal polymer (LCP) dielectric layers are directly bonded, respectively, to first and second opposing surface of a thermally conductive layer, with no extrinsic adhesive material bonding the thermally conductive layer with either the first or second LCP dielectric layer. In a second embodiment, first and second 2S1P substructures are directly bonded, respectively, to first and second opposing surfaces of a LCP dielectric joining layer, with no extrinsic adhesive material bonding the LCP dielectric joining layer with either the first or second 2S1P substructures.
摘要翻译：多层互连结构和形成方法。在第一实施例中，第一和第二液晶聚合物（LCP）电介质层分别直接接合到导热层的第一和第二相对表面，没有外在粘合材料将导热层与第一或第二液晶聚合物 LCP电介质层。在第二实施例中，第一和第二2S1P子结构分别直接接合到LCP电介质接合层的第一和第二相对表面，没有外部粘合材料将LCP电介质接合层与第一或第二2S1P子结构结合。

9. 发明申请

US20080191353A1 Multilayered circuitized substrate with p-aramid dielectric layers and method of making same 失效
标题翻译：具有对芳族聚酰胺介电层的多层电路基板及其制造方法
公开(公告)号：US20080191353A1
公开(公告)日：2008-08-14
申请号：US12081042
申请日：2008-04-10
申请人： Robert M. Japp , Voya R. Markovich , Kostas I. Papathomas , Mark D. Poliks
发明人： Robert M. Japp , Voya R. Markovich , Kostas I. Papathomas , Mark D. Poliks
IPC分类号： H01L23/485 , H05K3/30
CPC分类号： H01L23/145 , H01L23/3733 , H01L23/3735 , H01L23/4922 , H01L23/49822 , H01L23/49827 , H01L23/564 , H01L2924/0002 , H01L2924/12044 , H05K1/0366 , H05K1/0373 , H05K3/4602 , H05K3/4626 , H05K3/4652 , H05K3/4655 , H05K3/4688 , H05K2201/0209 , H05K2201/0278 , H05K2201/068 , Y10T29/4913 , Y10T156/10 , H01L2924/00
摘要： A multilayered circuitized substrate including a plurality of dielectric layers each comprised of a p-aramid paper impregnated with a halogen-free, low moisture absorptivity resin including an inorganic filler but not including continuous or semi-continuous fiberglass fibers as part thereof, and a first circuitized layer positioned on a first of the dielectric layers. A method of making this substrate is also provided.
摘要翻译：一种多层电路化基板，包括多个介电层，每个电介质层由浸渍有不含卤素的低吸湿性树脂的对芳族聚酰胺纸构成，所述不含卤素的低吸湿性树脂包括无机填料，但不包括连续或半连续的玻璃纤维作为其一部分，电路层位于第一介电层上。还提供了制造该基板的方法。

10. 发明授权

US06722031B2 Method for making printed circuit board having low coefficient of thermal expansion power/ground plane 有权
标题翻译：制造具有低热膨胀系数/印刷电路板的方法
公开(公告)号：US06722031B2
公开(公告)日：2004-04-20
申请号：US10012426
申请日：2001-12-07
申请人： Robert M. Japp , Mark D. Poliks
发明人： Robert M. Japp , Mark D. Poliks
IPC分类号： H01K310
CPC分类号： H05K3/4641 , H05K1/0366 , H05K2201/0141 , H05K2201/0158 , H05K2201/0278 , H05K2201/0281 , H05K2201/029 , H05K2201/0323 , H05K2201/068 , H05K2201/09309 , Y10S428/901 , Y10T29/49126 , Y10T29/49165
摘要： Conductive materials that have low coefficients of thermal expansion (CTEs) and that are used for power and ground planes are disclosed. Fibrous materials (such as carbon, graphite, glass, quartz, polyethylene, and liquid crystal polymer fibers) with low CTEs are metallized to provide a resultant conductive material with a low CTE. Such fibers may be metallized in their individual state and then formed into a fabric, or these materials may be formed into a fabric and then metallized or a combination of both metallizations may be used. In addition, a graphite or carbon sheet may be metallized on one or both sides to provide a material that has a low CTE and high conductivity. These metallized, low CTE power and ground planes may be laminated with other planes/cores into a composite, or laminated into a core which is then laminated with other planes/cores into a composite. The resultant composite may be used for printed circuit boards (PCBs) or PCBs used as laminate chip carriers.
摘要翻译：公开了具有低热膨胀系数（CTE）并且用于电力和接地平面的导电材料。具有低CTE的纤维材料（例如碳，石墨，玻璃，石英，聚乙烯和液晶聚合物纤维）被金属化以提供具有低CTE的所得导电材料。这样的纤维可以以其单独状态进行金属化，然后形成织物，或者这些材料可以形成织物，然后金属化，或者可以使用两种金属化的组合。此外，石墨或碳片可以在一侧或两侧金属化，以提供具有低CTE和高导电性的材料。这些金属化的低CTE功率和接地层可以与其它平面/芯层压成复合材料，或者层压成芯，然后将其与其它平面/芯层叠合成复合材料。所得的复合材料可用于印刷电路板（PCB）或用作层压芯片载体的PCB。

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