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1. 发明授权

US4266233A I-C Wafer incorporating junction-type field-effect transistor 失效
标题翻译： I-C晶片结合结型场效应晶体管
公开(公告)号：US4266233A
公开(公告)日：1981-05-05
申请号：US103423
申请日：1979-12-14
申请人： Franco Bertotti , Mario Foroni
发明人： Franco Bertotti , Mario Foroni
IPC分类号： H01L29/78 , H01L21/76 , H01L21/761 , H01L27/06 , H01L27/088 , H01L29/808 , H01L29/80
CPC分类号： H01L21/761 , H01L27/0623 , H01L29/8083
摘要： A silicon wafer incorporating several semiconductor components, among them a junction-type field-effect transistor (J-FET) of low pinch-off voltage connectable as a resistor, comprises a substrate of P-type conductivity with an insular layer of N.sup.+ conductivity penetrated by one or more enclaves of substrate material. Thereafter, a stratum of N-doped silicon is epitaxially grown on the substrate, with formation of rising zones above each enclave and around the buried N.sup.+ layer which are heavily doped with P-type impurities to act as source connections or sinkers for an FET channel formed by the enclave or enclaves and as a barrier junction surrounding a section of the N-doped stratum which becomes the gate of the FET while the substrate serves as the drain.
摘要翻译：包含几个半导体部件的硅晶片，其中可连接为电阻器的低截止电压的结型场效应晶体管（J-FET）包括P型导电性的衬底，其具有穿透N +电导率的岛状层由一个或多个基底材料的飞行器。此后，在衬底上外延生长N掺杂硅层，在每个覆盖层周围形成上升区域，并在掩埋N +层周围形成重掺杂P型杂质的FET，用作FET沟道的源极连接或沉降片由所述飞行器或飞行器形成，并且当所述基板用作所述漏极时，所述阻挡结围绕成为所述FET的栅极的所述N掺杂层的一部分。

2. 发明授权

US06387725B1 Production method for integrated angular speed sensor device 有权
标题翻译：集成角速度传感器装置的生产方法
公开(公告)号：US06387725B1
公开(公告)日：2002-05-14
申请号：US09791965
申请日：2001-02-22
申请人： Paolo Ferrari , Benedetto Vigna , Mario Foroni , Marco Ferrera , Pietro Montanini
发明人： Paolo Ferrari , Benedetto Vigna , Mario Foroni , Marco Ferrera , Pietro Montanini
IPC分类号： H01L2100
CPC分类号： G01C19/574 , G01C19/5769 , G01P15/0802 , H01L21/76202 , H01L21/764
摘要： An angular speed sensor comprises a pair of mobile masses which are formed in an epitaxial layer and are anchored to one another and to the remainder of the device by anchorage elements. The mobile masses are symmetrical with one another, and have first mobile excitation electrodes which are intercalated with respective first fixed excitation electrodes and second mobile detection electrodes which are intercalated with second fixed detection electrodes. The first mobile and fixed excitation electrodes extend in a first direction and the second mobile and fixed detection electrodes extend in a second direction which is perpendicular to the first direction and is disposed on a single plane parallel to the surface of the device.
摘要翻译：角速度传感器包括一对移动质量块，其形成在外延层中并且通过锚定元件锚固到装置的其余部分。移动质量彼此对称，并且具有插入有第一固定激励电极的第一移动激励电极和插入第二固定检测电极的第二移动检测电极。第一移动和固定激励电极沿第一方向延伸，并且第二移动和固定检测电极在垂直于第一方向的第二方向上延伸并且设置在平行于装置表面的单个平面上。

3. 发明授权

US6104073A Semiconductor integrated capacitive acceleration sensor and relative fabrication method 失效
标题翻译：半导体集成电容式加速度传感器及相关制造方法
公开(公告)号：US6104073A
公开(公告)日：2000-08-15
申请号：US903511
申请日：1997-07-30
申请人： Paolo Ferrari , Mario Foroni , Benedetto Vigna , Flavio Villa
发明人： Paolo Ferrari , Mario Foroni , Benedetto Vigna , Flavio Villa
IPC分类号： G01P15/02 , B81B3/00 , B81C1/00 , G01P15/08 , G01P15/125 , H01L29/84 , H01L29/82 , H01L21/00 , H01L27/01 , H01L27/20
CPC分类号： G01P15/0802 , G01P15/125 , G01P2015/0814
摘要： The acceleration sensor is formed in a monocrystalline silicon wafer forming part of a dedicated SOI substrate presenting a first and second monocrystalline silicon wafer separated by an insulting layer having an air gap. A well is formed in the second wafer over the air gap and is subsequently trenched up to the air gap to release the monocrystalline silicon mass forming the movable mass of the sensor; the movable mass has two numbers of movable electrodes facing respective pluralities of fixed electrodes. In the idle condition, each movable electrode is separated by different distances from the two fixed electrodes facing the movable electrode.
摘要翻译：加速度传感器形成在形成由具有气隙的绝缘层分离的第一和第二单晶硅晶片的专用SOI衬底的一部分的单晶硅晶片中。在空气间隙中的第二晶片中形成一个阱，然后将其向上延伸到气隙以释放形成传感器的可移动质量块的单晶硅质量块; 可移动物体具有面对多个固定电极的两个可动电极数。在空闲状态下，每个可移动电极与面对可动电极的两个固定电极分开不同的距离。

4. 发明授权

US4725810A Method of making an implanted resistor, and resistor obtained thereby 失效
标题翻译：制造注入电阻器的方法和由此获得的电阻器
公开(公告)号：US4725810A
公开(公告)日：1988-02-16
申请号：US876964
申请日：1986-06-20
申请人： Mario Foroni , Paolo Ferrari , Franco Bertotti
发明人： Mario Foroni , Paolo Ferrari , Franco Bertotti
IPC分类号： H01L27/04 , H01C17/06 , H01L21/265 , H01L21/822 , H01L29/8605 , H01C1/02 , H01C17/00 , B05D5/12 , B44C1/22
CPC分类号： H01L29/8605 , H01L21/26513 , Y10T29/49082
摘要： This method of making an implanted resistor comprises the steps of implanting the resistor with ordinary techniques and deposition over the implanted resistor of a polysilicon layer having a set thickness and fully covering the resistor. Thus, the resulting resistor is unaffected by any subsequent thermal treatments and its value remains constant irrespective of any high potential metal layers or connections crossing it. The method affords in particular resistive values of the order of 1 kOhms/square.
摘要翻译：制造注入电阻器的这种方法包括以下步骤：通过普通技术注入电阻器并沉积在具有设定厚度并完全覆盖电阻器的多晶硅层的注入电阻器上。因此，所得到的电阻器不受任何后续热处理的影响，并且其值保持恒定，而与任何高电势金属层或穿过其的连接无关。该方法特别提供约1千欧姆/平方的电阻值。

5. 发明授权

US4910159A Method for incrementally increasing the collector area of a lateral PNP transistor during electrical testing of an integrated device on wafer 失效
标题翻译：在晶片上的集成器件的电测试期间逐渐增加横向PNP晶体管的集电极面积的方法
公开(公告)号：US4910159A
公开(公告)日：1990-03-20
申请号：US288163
申请日：1988-12-22
申请人： Franco Bertotti , Paolo Ferrari , Mario Foroni , Maria T. Gatti
发明人： Franco Bertotti , Paolo Ferrari , Mario Foroni , Maria T. Gatti
IPC分类号： G01R31/30 , H01L21/66 , H01L29/08 , H01L29/36
CPC分类号： H01L22/22 , G01R31/30 , H01L29/0821 , H01L29/36
摘要： The collector area of a lateral PNP transistor may be incrementally increased during an electic testing step on wafer of an integrated circuit by purposely forming an auxiliary p-type diffused collector region having fractional dimensions near the primary collector region of the transistor and by permanently shorcircuiting the two regions by means of a "Zener zapping" technique, by forcing a current through the inversely biased base-collector junction utilizing a suitable contact pad connected to the auxiliary collector region to create localized power dissipation conditions sufficient to melt the metal of the respective metal at the adjacent contacts and to form a permanent connection between the two metals. The technique is very useful for adjusting the value of the output current(s) in precision current generating circuits.

6. 发明授权

US4319262A Integrated-circuit structure including lateral PNP transistor with polysilicon layer bridging gap in collector field relief electrode 失效
标题翻译：集成电路结构包括横向PNP晶体管，在集电极场放电电极中具有多晶硅层桥接间隙
公开(公告)号：US4319262A
公开(公告)日：1982-03-09
申请号：US120923
申请日：1980-02-12
申请人： Franco Bertotti , Vincenzo Prestileo , Mario Foroni
发明人： Franco Bertotti , Vincenzo Prestileo , Mario Foroni
IPC分类号： H01L21/8224 , H01L21/331 , H01L23/482 , H01L27/082 , H01L29/08 , H01L29/417 , H01L29/73 , H01L29/735 , H01L29/72
CPC分类号： H01L29/41708 , H01L23/4824 , H01L29/735 , H01L2924/0002
摘要： A lateral PNP transistor with concentric p-doped emitter and collector diffusion zones in an n-doped base layer epitaxially grown on a p-type silicon substrate, covered by a layer of silicon oxide, has emitter and collector electrodes in the form of metallic patches on the oxide layer overlying the respective diffusion zones and penetrating the oxide at limited contact areas. The metallic patches extend above an annular base-layer portion separating the two diffusion zones and symmetrically approach a circular centerline of this annular portion in order to guard against punch-through upon accidental polarity reversal of the collector/emitter voltage. A narrow peripheral gap in the collector electrode is traversed by an elongate metal strip which forms a radial extension of the emitter electrode leading to a supply terminal, the spacing of that strip from the gap edges substantially equaling the radial distance between the confronting peripheral boundaries of the two patches. If the diffusion zone of the collector is peripherally continuous instead of being interrupted in the region of the gap of the overlying electrode, the gap is bridged by a stratum of p-doped polycrystalline silicon embedded in the oxide layer and in conductive contact with the collector electrode on opposite sides of the gap, this stratum having an edge complementing the inner boundary of the metallic collector patch to a full circle around the emitter patch.
摘要翻译：在由氧化硅层覆盖的p型硅衬底上外延生长的n掺杂基底层中具有同心p掺杂发射极和集电极扩散区的横向PNP晶体管具有金属贴片形式的发射极和集电极在覆盖各个扩散区的氧化物层上并在有限的接触区域穿透氧化物。金属贴片在分开两个扩散区域的环形基层部分上方延伸，并对称地接近该环形部分的圆形中心线，以便在集电极/发射极电压的偶然极性反转时防止穿通。集电极中的狭窄的周边间隙被细长的金属条横穿，该细长的金属条形成了通向供电端的发射电极的径向延伸，该带与间隙边缘的间隔基本上等于相对的外围边界之间的径向距离两个补丁。如果收集器的扩散区域是外围连续的而不是在覆盖电极的间隙的区域中断，则间隙由嵌入在氧化物层中的p掺杂多晶硅层与集电器导电接触而桥接电极在间隙的相对侧上，该层具有将金属收集器贴片的内边界补充到围绕发射器贴片的整个圆周的边缘。

7. 发明授权

US06232140B1 Semiconductor integrated capacitive acceleration sensor and relative fabrication method 有权
标题翻译：半导体集成电容式加速度传感器及相关制造方法
公开(公告)号：US06232140B1
公开(公告)日：2001-05-15
申请号：US09458400
申请日：1999-12-10
申请人： Paolo Ferrari , Mario Foroni , Benedetto Vigna , Flavio Villa
发明人： Paolo Ferrari , Mario Foroni , Benedetto Vigna , Flavio Villa
IPC分类号： H01L2100
CPC分类号： G01P15/0802 , G01P15/125 , G01P2015/0814
摘要： The acceleration sensor is formed in a monocrystalline silicon wafer forming part of a dedicated SOI substrate presenting a first and second monocrystalline silicon wafer separated by an insulting layer having an air gap. A well is formed in the second wafer over the air gap and is subsequently trenched up to the air gap to release the monocrystalline silicon mass forming the movable mass of the sensor; the movable mass has two numbers of movable electrodes facing respective pluralities of fixed electrodes. In the idle condition, each movable electrode is separated by different distances from the two fixed electrodes facing the movable electrode.
摘要翻译：加速度传感器形成在形成由具有气隙的绝缘层分离的第一和第二单晶硅晶片的专用SOI衬底的一部分的单晶硅晶片中。在空气间隙中的第二晶片中形成一个阱，然后将其向上延伸到气隙以释放形成传感器的可移动质量块的单晶硅质量块; 可移动物体具有面对多个固定电极的两个可动电极数。在空闲状态下，每个可移动电极与面对可动电极的两个固定电极分开不同的距离。

8. 发明授权

US4631561A Semiconductor overvoltage suppressor with accurately determined striking potential 失效
标题翻译：具有精确确定的击穿电位的半导体过电压抑制器
公开(公告)号：US4631561A
公开(公告)日：1986-12-23
申请号：US633434
申请日：1984-07-23
申请人： Mario Foroni , Franco Bertotti
发明人： Mario Foroni , Franco Bertotti
IPC分类号： H01L29/74 , H01L27/06 , H01L29/36 , H01L29/78 , H01L29/861 , H01L29/87 , H01L29/90
CPC分类号： H01L29/36 , H01L29/87
摘要： A semiconductor suppressor device consists of a structure including a P-type substrate, an N-type epitaxial layer, a first P-type diffusion region in the epitaxial layer, and a second N-type diffusion region in the first region. A first metallic layer which is in contact with the substrate and a second metallic region which is in contact with the first and the second regions form the terminals of the device. The epitaxial layer has at least one zone along the junction with the first region which has a higher concentration than the rest of the layer so that the conduction through a reverse-biased junction occurs in this zone. This enables the establishment of a highly accurate striking potential for the suppressor device.
摘要翻译：半导体抑制装置由包括P型基板，N型外延层，外延层中的第一P型扩散区域和第一区域中的第二N型扩散区域的结构构成。与基板接触的第一金属层和与第一和第二区域接触的第二金属区域形成装置的端子。外延层具有沿着与第一区域的结的至少一个区域，其具有比其余层更高的浓度，使得在该区域中发生通过反向偏置结的导通。这使得能够建立用于抑制器装置的高精度的击打电位。

9. 发明授权

US4614962A Controlled electronic switching device for the suppression of transients 失效
标题翻译：控制电子开关器件用于抑制瞬变
公开(公告)号：US4614962A
公开(公告)日：1986-09-30
申请号：US677763
申请日：1984-12-03
申请人： Franco Bertotti , Paolo Ferrari , Mario Foroni , Sergio Garue
发明人： Franco Bertotti , Paolo Ferrari , Mario Foroni , Sergio Garue
IPC分类号： H02M3/155 , H01L29/08 , H01L29/74 , H01L27/02 , H03K17/60
CPC分类号： H01L29/7428 , H01L29/0839
摘要： This controlled electronic switching device for the suppression of transients can change over from a non-conductive state to a conductive state at lower triggering current levels than conventional devices while retaining unaltered its response characteristics to variations in the voltage applied thereacross. The device comprises a main switch which is triggered by a parallel-connected auxiliary switch having smaller junction areas and a higher capacitive current shunt resistance (resistance between base and emitter) than the main switch, thereby it turns on at lower control currents from the gate electrode for a given response to voltage variations.
摘要翻译：用于抑制瞬态的受控电子开关器件可以以比传统器件更低的触发电流水平从非导通状态转变为导通状态，同时保持其对其中施加的电压变化的响应特性。该装置包括主开关，其由并联连接的辅助开关触发，该辅助开关具有比主开关更小的结面积和更高的电容电流分流电阻（基极和发射极之间的电阻），从而在较低的控制电流下从门电极用于对电压变化的给定响应。

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