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1. 发明申请

WO2007118034A3 SYSTEM AND METHOD FOR WRITE FAILURE RECOVERY 审中-公开
标题翻译：用于写入故障恢复的系统和方法
公开(公告)号：WO2007118034A3
公开(公告)日：2009-08-13
申请号：PCT/US2007065679
申请日：2007-03-30
申请人： SANDISK CORP , ELHAMIAS REUVEN , MANI VIVEK VENKATRAMEN , COHEN NIV
发明人： ELHAMIAS REUVEN , MANI VIVEK VENKATRAMEN , COHEN NIV
IPC分类号： H04L9/32
CPC分类号： H04L9/0637 , G06F11/1666 , G06F11/2053 , H04L9/0643
摘要： When cipher block chaining encryption/decryption is employed, write fault recovery is accomplished by storing information useful for the writing of cipher block chaining processed data before it is written to storage cells. Hence when write failure is discovered, this information stored can be retrieved for rewriting the data to the cells. Preferably, the information stored includes security configuration information for cipher block chaining processing a unit of data.
摘要翻译：当使用密码块链接加密/解密时，通过在将密码块链接处理的数据写入存储单元之前存储对写入密码块链接处理的数据有用的信息来实现写入故障恢复。因此，当发现写入失败时，可以检索存储的信息以将数据重写到单元。优选地，存储的信息包括用于密码块链接处理数据单元的安全配置信息。

2. 发明申请

WO2008070053A2 PORTABLE MODULE INTERFACE WITH TIMEOUT PREVENTION BY DUMMY BLOCKS 审中-公开
标题翻译：便携式模块接口，具有DUMMY BLOCKS防止超时功能
公开(公告)号：WO2008070053A2
公开(公告)日：2008-06-12
申请号：PCT/US2007/024797
申请日：2007-12-04
申请人： SANDISK CORPORATION , ELHAMIAS, Reuven , ZEHAVI, David , BARZILAI, Roni , MANI, Vivek , STOLERO, Simon
发明人： ELHAMIAS, Reuven , ZEHAVI, David , BARZILAI, Roni , MANI, Vivek , STOLERO, Simon
IPC分类号： G06F15/16 , G06F13/00
CPC分类号： G06F13/385 , G06F13/4234
摘要： Methods and systems for working around the timeout limitations of physical interface standards for detachable modules. By use of dummy data blocks to keep the bus active, the bus timeout requirements (in either direction) can be spoofed, to thereby permit more complex processing operations to be performed, which otherwise might not fit reliably within the timeout period. This permits a memory system to execute applications or process data for a time period that may exceed the bus timeout of a particular specification. A controller in the memory system deasserts the ready signal and holds the bus connecting the computer system in a "busy" state until the memory system is about to timeout. During a write operation, the controller receives dummy data blocks from the computer system before the write bus timeout period expires, causing the bus timeout period to be reset. During a read operation, the controller sends dummy data blocks to the computer system before the read bus timeout period expires, causing the bus timeout period to be reset.
摘要翻译：用于解决可拆卸模块的物理接口标准的超时限制的方法和系统。通过使用伪数据块来保持总线活动，可以欺骗总线超时要求（在任一方向），从而允许执行更复杂的处理操作，否则可能在超时时间段内不可靠地适应。这允许存储器系统在可能超过特定规范的总线超时的时间段内执行应用程序或处理数据。存储器系统中的控制器取消准备就绪信号并将连接计算机系统的总线保持在“忙碌” 直到内存系统即将超时。在写入操作期间，控制器在写入总线超时周期到期之前从计算机系统接收虚拟数据块，导致总线超时周期被重置。在读操作期间，控制器在读总线超时周期到期之前向计算机系统发送伪数据块，导致总线超时周期被重置。

3. 发明申请

WO2007118034A2 SYSTEM AND METHOD FOR WRITE FAILURE RECOVERY 审中-公开
标题翻译：用于写入故障恢复的系统和方法
公开(公告)号：WO2007118034A2
公开(公告)日：2007-10-18
申请号：PCT/US2007/065679
申请日：2007-03-30
申请人： SANDISK CORPORATION , ELHAMIAS, Reuven , MANI, Vivek Venkatramen , COHEN, Niv
发明人： ELHAMIAS, Reuven , MANI, Vivek Venkatramen , COHEN, Niv
CPC分类号： H04L9/0637 , G06F11/1666 , G06F11/2053 , H04L9/0643
摘要： When cipher block chaining encryption/decryption is employed, write fault recovery is accomplished by storing information useful for the writing of cipher block chaining processed data before it is written to storage cells. Hence when write failure is discovered, this information stored can be retrieved for rewriting the data to the cells. Preferably, the information stored includes security configuration information for cipher block chaining processing a unit of data.
摘要翻译：当使用密码块链接加密/解密时，通过在将密码块链接处理的数据写入存储单元之前存储对写入密码块链接处理的数据有用的信息来实现写入故障恢复。因此，当发现写入失败时，可以检索存储的信息以将数据重写到单元。优选地，存储的信息包括用于密码块链接处理数据单元的安全配置信息。

4. 发明申请

WO2008070053A3 PORTABLE MODULE INTERFACE WITH TIMEOUT PREVENTION BY DUMMY BLOCKS 审中-公开
标题翻译：便携式模块接口，由DUMMY块阻止超时
公开(公告)号：WO2008070053A3
公开(公告)日：2008-08-21
申请号：PCT/US2007024797
申请日：2007-12-04
申请人： SANDISK CORP , ELHAMIAS REUVEN , ZEHAVI DAVID , BARZILAI RONI , MANI VIVEK , STOLERO SIMON
发明人： ELHAMIAS REUVEN , ZEHAVI DAVID , BARZILAI RONI , MANI VIVEK , STOLERO SIMON
IPC分类号： G06F15/16 , G06F13/00
CPC分类号： G06F13/385 , G06F13/4234
摘要： Methods and systems for working around the timeout limitations of physical interface standards for detachable modules. By use of dummy data blocks to keep the bus active, the bus timeout requirements (in either direction) can be spoofed, to thereby permit more complex processing operations to be performed, which otherwise might not fit reliably within the timeout period. This permits a memory system to execute applications or process data for a time period that may exceed the bus timeout of a particular specification. A controller in the memory system deasserts the ready signal and holds the bus connecting the computer system in a "busy" state until the memory system is about to timeout. During a write operation, the controller receives dummy data blocks from the computer system before the write bus timeout period expires, causing the bus timeout period to be reset. During a read operation, the controller sends dummy data blocks to the computer system before the read bus timeout period expires, causing the bus timeout period to be reset.
摘要翻译：解决可拆卸模块物理接口标准超时限制的方法和系统。通过使用虚拟数据块来保持总线有效，可以欺骗总线超时要求（在任一方向上），从而允许执行更复杂的处理操作，否则在超时时间段内可能不可靠。这允许存储器系统在可能超过特定规范的总线超时的时间段内执行应用或处理数据。存储器系统中的控制器取消准备就绪信号并保持连接计算机系统处于“忙”状态的总线，直到存储器系统即将超时。在写入操作期间，控制器在写入总线超时时间到期之前从计算机系统接收虚拟数据块，导致总线超时周期被复位。在读操作期间，控制器在读总线超时时间到期之前，向计算机系统发送伪数据块，导致总线超时时间被重置。

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