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1. 发明授权

US5334554A Nitrogen plasma treatment to prevent field device leakage in VLSI processing 失效
标题翻译：氮等离子体处理，以防止VLSI处理中的现场设备泄漏
公开(公告)号：US5334554A
公开(公告)日：1994-08-02
申请号：US825371
申请日：1992-01-24
申请人： Kwang-Ming Lin , Lih-Shyig Tsai , Jiunn-Jyi Lin , Yung-Haw Liaw
发明人： Kwang-Ming Lin , Lih-Shyig Tsai , Jiunn-Jyi Lin , Yung-Haw Liaw
IPC分类号： H01L21/768 , H01L21/469
CPC分类号： H01L21/76801 , H01L21/76819 , H01L21/76826 , H01L21/76828
摘要： A method for forming multiple layer metallurgy, spin-on-glass multilayer metallurgy for a one micrometer or less feature size integrated circuit with substantially free field inversion, that is the positive charge between the first via layer and the SOG is described. A semiconductor substrate having a pattern of field effect device source/drain regions therein with a pattern of gate dielectric and gate electrode structures associated therewith and a pattern of field isolation structures at least partially within semiconductor substrate electrically separating certain of these source/drain regions from one another are provided. A passivation layer is formed over the surfaces of said patterns. Then the multilayer metallurgy is formed thereover by opening a pattern of openings through the passivation layer to at least some of the source/drain regions, depositing and patterning a first metallurgy layer in contact with the pattern of openings, forming a first via dielectric layer over the pattern of first metallurgy layer, exposing the first silicon oxide via dielectric layer to a nitrogen plasma, forming a spin-on-glass layer over the via dielectric layer and curing the layer, forming a second via dielectric layer over the spin-on-glass layer, forming a pattern of openings in the second via layer, the spin-on-glass layer, and the first via layer, and depositing and patterning a second metallurgy layer through the openings to make electrical contact with the first metallurgy layer.
摘要翻译：描述了一种用于形成具有基本自由场反转的一微米或更小特征尺寸集成电路的多层冶金，旋涂玻璃多层冶金的方法，即第一通孔层和SOG之间的正电荷。一种具有场效应器件源极/漏极区域的图案的半导体衬底，其栅极电介质和栅极电极结构的图案与其相关联，并且至少部分地在半导体衬底内的场隔离结构的图案将这些源极/漏极区域中的某些从提供了另一个。在所述图案的表面上形成钝化层。然后通过将通过钝化层的开口图案打开到至少一些源极/漏极区域，沉积和图案化与开口图案接触的第一冶金层，从而形成多层冶金，形成第一通孔电介质层所述第一冶金层的图案，通过介电层将所述第一氧化硅暴露于氮等离子体，在所述通孔电介质层上形成旋涂玻璃层并固化所述层，在所述自旋 - 玻璃层，在第二通孔层，旋涂玻璃层和第一通孔层中形成开口图案，并且通过开口沉积和图案化第二冶金层以与第一冶金层电接触。

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