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1. 发明申请

US20080209164A1 Microprocessor Architectures 有权
标题翻译：微处理器架构
公开(公告)号：US20080209164A1
公开(公告)日：2008-08-28
申请号：US11815535
申请日：2006-02-07
申请人： Leon David Wildman
发明人： Leon David Wildman
IPC分类号： G06F15/80 , G06F9/02
CPC分类号： G06F9/3885 , G06F9/30123 , G06F9/3836 , G06F9/3838 , G06F9/3851 , G06F9/3887 , G06F15/8007 , G06F15/8053
摘要： A microprocessor architecture comprises a plurality of processing elements arranged in a single instruction multiple data SIMD array, wherein each processing element includes a plurality of execution units, each of which is operable to process an instruction of a particular instruction type, a serial processor which includes a plurality of execution units, each of which is operable to process an instruction of a particular instruction type, and an instruction controller operable to receive a plurality of instructions, and to distribute received instructions to the execution units in dependence upon the instruction types of the received instruction. The execution units of the serial processor are operable to process respective instructions in parallel.
摘要翻译：微处理器架构包括布置在单指令多数据SIMD阵列中的多个处理元件，其中每个处理元件包括多个执行单元，每个执行单元可操作以处理特定指令类型的指令，串行处理器，其包括多个执行单元，每个执行单元可操作以处理特定指令类型的指令;以及指令控制器，其可操作以接收多个指令，并且将接收的指令分配到执行单元，该指令依赖于收到指令。串行处理器的执行单元可操作以并行处理相应的指令。

2. 发明授权

US08447953B2 Instruction controller to distribute serial and SIMD instructions to serial and SIMD processors 有权
标题翻译：串行和SIMD指令分配给串行和SIMD处理器的指令控制器
公开(公告)号：US08447953B2
公开(公告)日：2013-05-21
申请号：US11815535
申请日：2006-02-07
申请人： Leon David Wildman
发明人： Leon David Wildman
IPC分类号： G06F9/30
CPC分类号： G06F9/3885 , G06F9/30123 , G06F9/3836 , G06F9/3838 , G06F9/3851 , G06F9/3887 , G06F15/8007 , G06F15/8053
摘要： A microprocessor architecture comprises a plurality of processing elements arranged in a single instruction multiple data SIMD array, wherein each processing element includes a plurality of execution units, each of which is operable to process an instruction of a particular instruction type, a serial processor which includes a plurality of execution units, each of which is operable to process an instruction of a particular instruction type, and an instruction controller operable to receive a plurality of instructions, and to distribute received instructions to the execution units in dependence upon the instruction types of the received instruction. The execution units of the serial processor are operable to process respective instructions in parallel.
摘要翻译：微处理器架构包括布置在单指令多数据SIMD阵列中的多个处理元件，其中每个处理元件包括多个执行单元，每个执行单元可操作以处理特定指令类型的指令，串行处理器，其包括多个执行单元，每个执行单元可操作以处理特定指令类型的指令;以及指令控制器，其可操作以接收多个指令，并且将接收的指令分配到执行单元，该指令依赖于收到指令。串行处理器的执行单元可操作以并行处理相应的指令。

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