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    • 2. 发明授权
    • Plasma display panel and multi-plasma display panel
    • 等离子显示面板和多等离子显示面板
    • US08624492B2
    • 2014-01-07
    • US13094031
    • 2011-04-26
    • Soomyun LeeKyungtae Kim
    • Soomyun LeeKyungtae Kim
    • H01J17/49
    • H01J11/12H01J11/48H01J11/54
    • A plasma display panel and a multi plasma display panel are disclosed. The plasma display panel includes a front substrate, a back substrate positioned opposite the front substrate, a barrier rib positioned between the front substrate and the back substrate to partition a discharge cell, and a seal portion positioned outside the barrier rib in an area between the front substrate and the back substrate. A distance between the barrier rib and the seal portion on one side of the plasma display panel is different from a distance between the barrier rib and the seal portion on the other side of the plasma display panel opposite the one side.
    • 公开了等离子体显示面板和多等离子体显示面板。 等离子体显示面板包括前基板,与前基板相对定位的背基板,位于前基板和后基板之间的隔板,以分隔放电单元;以及密封部分,位于隔板之间的区域内 前基板和后基板。 等离子显示面板一侧的隔壁与密封部之间的距离与等离子体显示面板的与一侧相反的另一侧的隔壁与密封部之间的距离不同。
    • 6. 发明授权
    • Multitaper spectrum sensing systems and methods
    • 多频谱传感系统和方法
    • US08717922B2
    • 2014-05-06
    • US13284442
    • 2011-10-28
    • Yan XinKyungtae KimSampath Rangarajan
    • Yan XinKyungtae KimSampath Rangarajan
    • H04L12/26
    • H04W16/14H04L27/0006
    • Spectrum sensing methods and systems for detecting spectrum holes for use in cognitive radio secondary transmissions are disclosed. In one method, an indication of an assignment of a set of subcarriers to a primary user is received. The method further includes determining multitaper spectral estimates for at least a subset of the set of subcarriers based on the assignment of the set of subcarriers to the primary user by processing samples for the at least a subset of the set of subcarriers. In addition, a test statistic that is based on the multitaper spectral estimates is compared to a threshold to determine whether the set of subcarriers is utilized for primary transmissions to the primary user. Moreover, data signals are received on at least one of the subcarriers in the set of subcarriers if the set of subcarriers is not utilized for primary transmissions to the primary user.
    • 公开了用于在认知无线电二次传输中使用的用于检测频谱孔的频谱感测方法和系统。 在一种方法中,接收向主用户分配一组子载波的指示。 该方法还包括:通过处理子载波组的至少一个子集的样本,基于通过向主用户的子载波集合的分配来确定子载波组的至少子集的多频谱估计。 此外,将基于多频谱估计的测试统计量与阈值进行比较,以确定该副载波集合是否用于主用户的主要传输。 此外,如果子载波的集合不用于主要用户的主要传输,则在子载波组中的至少一个子载波上接收数据信号。
    • 7. 发明申请
    • PLASMA DISPLAY PANEL AND MULTI-PLASMA DISPLAY PANEL
    • 等离子显示面板和多等离子显示面板
    • US20110259624A1
    • 2011-10-27
    • US13094031
    • 2011-04-26
    • Soomyun LeeKyungtae Kim
    • Soomyun LeeKyungtae Kim
    • H05K5/06
    • H01J11/12H01J11/48H01J11/54
    • A plasma display panel and a multi plasma display panel are disclosed. The plasma display panel includes a front substrate, a back substrate positioned opposite the front substrate, a barrier rib positioned between the front substrate and the back substrate to partition a discharge cell, and a seal portion positioned outside the barrier rib in an area between the front substrate and the back substrate. A distance between the barrier rib and the seal portion on one side of the plasma display panel is different from a distance between the barrier rib and the seal portion on the other side of the plasma display panel opposite the one side.
    • 公开了等离子体显示面板和多等离子体显示面板。 等离子体显示面板包括前基板,与前基板相对定位的背基板,位于前基板和后基板之间的隔板,以分隔放电单元;以及密封部分,位于隔板之间的区域内 前基板和后基板。 等离子显示面板一侧的隔壁与密封部之间的距离与等离子体显示面板的与一侧相反的另一侧的隔壁与密封部之间的距离不同。
    • 8. 发明申请
    • MULTI PLASMA DISPLAY PANEL
    • 多等离子显示面板
    • US20110115357A1
    • 2011-05-19
    • US12638367
    • 2009-12-15
    • Soomyun LeeYonggi ChoiKyungtae Kim
    • Soomyun LeeYonggi ChoiKyungtae Kim
    • H01J17/49
    • H01J11/12H01J11/54H01J2209/38
    • A multi plasma display panel is disclosed. The multi plasma display panel includes a plurality of plasma display panels positioned adjacent to one another, each of the plurality of plasma display panels including, a front substrate on which a first electrode is positioned, a rear substrate on which a second electrode crossing the first electrode is positioned, a barrier rib between the front substrate and the rear substrate, the barrier rib providing a plurality of discharge cells, and an exhaust hole on the rear substrate. The exhaust hole is formed in at least one of the plurality of discharge cells. A size of a discharge cell in which the exhaust hole is formed is greater than a size of at least one discharge cell in which the exhaust hole is not formed.
    • 公开了一种多等离子体显示面板。 多等离子体显示面板包括彼此相邻定位的多个等离子体显示面板,多个等离子体显示面板中的每一个包括:第一电极定位在其上的前基板,后基板,第二电极跨越第一电极 电极被定位在前基板和后基板之间的隔壁,隔壁提供多个放电单元,以及后基板上的排气孔。 排气孔形成在多个放电单元中的至少一个。 形成排气孔的放电单元的尺寸大于不形成排气孔的至少一个放电单元的尺寸。
    • 10. 发明授权
    • Method of manufacturing DRAM cell
    • 制造DRAM单元的方法
    • US5068200A
    • 1991-11-26
    • US490326
    • 1990-03-08
    • Laegu KangKyungtae Kim
    • Laegu KangKyungtae Kim
    • H01L27/04H01L21/822H01L21/8242H01L27/10H01L27/108H01L29/78
    • H01L27/10852H01L27/10808
    • This invention relates to a method of manufacturing a DRAM cell which has a stacked capacitor and forming drain and source polycrystalline silicon regions on surface of a semiconductor substrate. The invention is directed to: a first step for forming a field oxide film and channel stopper as well as a polycrystalline silicon oxide film doped with impurities; a second step for dividing said silicon into a drain and source polycrystalline silicon region and forming a gate oxide film between the two silicon regions simultaneously with the drain and source diffusion regions and a gate electrode on the gate nitride film; a third step for forming an insulating film on the upper surface of the nitride film and a window on the source polycrystalline silicon region, a storage poly contacting with the same through the window; a fourth step for forming a dielectric layer and a plate poly of the stacked capacitor; and a fifth step forming another insulating film thereon and forming a window on the drain polycrystalline silicon region and also forming a bit line contacting with the exposed drain polycrystalline silicon region through that window. This invention can prevent the generation of leakage current resulting from the damage caused by the drain and source diffusion polycrystalline silicon regions when an etching process is used for the formation of the storage poly and the bit line.
    • 本发明涉及一种具有堆叠电容器并在半导体衬底的表面上形成漏极和源极多晶硅区域的DRAM单元的制造方法。 本发明涉及:形成场氧化物膜和通道阻挡物的第一步骤以及掺杂有杂质的多晶氧化硅膜; 将所述硅分成漏极和源极多晶硅区域并在所述两个硅区域之间与所述漏极和源极扩散区域同时形成栅极氧化膜以及所述栅极氮化物膜上的栅电极的第二步骤; 用于在氮化物膜的上表面上形成绝缘膜的第三步骤和源多晶硅区域上的窗口,通过窗口与其接触的储存器; 用于形成叠层电容器的电介质层和板状多晶硅的第四步骤; 以及在其上形成另一绝缘膜并在漏极多晶硅区域上形成窗口的第五步骤,并且还形成通过该窗口与暴露的漏极多晶硅区域接触的位线。 本发明可以防止当使用蚀刻工艺形成存储多晶硅和位线时由漏极和源极扩散多晶硅区域引起的损坏产生漏电流。