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1. 发明申请

US20090098673A1 THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：薄膜晶体管阵列及其制造方法
公开(公告)号：US20090098673A1
公开(公告)日：2009-04-16
申请号：US12334241
申请日：2008-12-12
申请人： Sung-Hoon Yang , Kunal Satyabhushan Girotra , Byoung-June Kim
发明人： Sung-Hoon Yang , Kunal Satyabhushan Girotra , Byoung-June Kim
IPC分类号： H01L21/77
CPC分类号： H01L29/458 , H01L27/124 , H01L27/1288 , H01L29/4908
摘要： A TFT array panel-including a substrate, a gate line having a gate electrode, a gate insulating layer formed on the gate line, a data line having a source electrode and a drain electrode spaced apart from the source electrode, a passivation layer formed on the data line and the drain electrode, and a pixel electrode connected to the drain electrode is provided. The TFT array panel further includes a protection layer including Si under at least one of the gate insulating layer and the passivation layer to enhance reliability.
摘要翻译：一种TFT阵列面板，包括基板，具有栅极电极的栅极线，栅极线上形成的栅极绝缘层，具有与源极间隔开的源极和漏电极的数据线，形成在源电极上的钝化层提供数据线和漏电极以及连接到漏电极的像素电极。 TFT阵列板还包括在栅极绝缘层和钝化层中的至少一个之下包括Si的保护层，以增强可靠性。

2. 发明申请

US20100012943A1 THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：薄膜晶体管及其制造方法
公开(公告)号：US20100012943A1
公开(公告)日：2010-01-21
申请号：US12429125
申请日：2009-04-23
申请人： Seung-Kyu Park , Kunal Satyabhushan Girotra , Jong-Moo Huh
发明人： Seung-Kyu Park , Kunal Satyabhushan Girotra , Jong-Moo Huh
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L27/1251 , H01L27/1248 , H01L29/66757 , H01L29/78675
摘要： The present invention relates to a thin film transistor and a manufacturing method thereof. A thin film transistor according to an exemplary embodiment of the present invention includes: a first electrode arranged on a substrate; a second electrode arranged on the substrate and separated from the first electrode; a first ohmic contact arranged on an upper surface of the first electrode; a second ohmic contact arranged on an upper surface of the second electrode; a first buffer member covering a lateral surface of the first electrode and the second electrode; a semiconductor member contacted with an upper surface of the first buffer member, and the first ohmic contact and the second ohmic contact; an insulating layer arranged on the semiconductor member; and a third electrode arranged on the insulating layer, and disposed on the semiconductor member.
摘要翻译：薄膜晶体管及其制造方法技术领域本发明涉及薄膜晶体管及其制造方法。根据本发明的示例性实施例的薄膜晶体管包括：布置在基板上的第一电极; 布置在所述基板上并与所述第一电极分离的第二电极; 布置在所述第一电极的上表面上的第一欧姆接触; 布置在所述第二电极的上表面上的第二欧姆接触; 覆盖所述第一电极和所述第二电极的侧表面的第一缓冲部件; 与第一缓冲构件的上表面接触的半导体构件，以及第一欧姆接触和第二欧姆接触; 布置在所述半导体部件上的绝缘层; 以及布置在所述绝缘层上的第三电极，并且设置在所述半导体部件上。

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