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    • 1. 发明授权
    • Motor drive circuit for rotating a rotor by supplying the currents to two coils
    • 用于通过向两个线圈提供电流来旋转转子的电动机驱动电路
    • US08604744B2
    • 2013-12-10
    • US12978958
    • 2010-12-27
    • Kazumasa TakaiTakeshi NaganumaKosaku HiokiYoshihiro Niwa
    • Kazumasa TakaiTakeshi NaganumaKosaku HiokiYoshihiro Niwa
    • G05B19/40
    • H02P8/36H02P8/22
    • When a driver unit is in a high impedance state as viewed from a first coil or a second coil, an induced voltage detector detects the voltage across the first coil or that across the second coil so as to detect an induced voltage occurring in the first coil or the second coil. The induced voltage detector includes a differential amplifier circuit for differentially amplifying an electric potential across the first coil or that across the second coil, and an analog-to-digital converter circuit for converting an analog value outputted from the differential amplifier circuit into a digital value and outputting the converted digital value to a control unit. The control unit generates a drive signal based on an input signal set externally and adjusts the drive signal in accordance with the induced voltage detected by the induced voltage detector so as to set the adjusted drive signal in the driver unit.
    • 当驱动器单元处于从第一线圈或第二线圈观察到的高阻抗状态时,感应电压检测器检测跨越第一线圈或跨越第二线圈的电压,以便检测在第一线圈中产生的感应电压 或第二线圈。 感应电压检测器包括用于差分放大跨越第一线圈或跨越第二线圈的电位的差分放大器电路和用于将从差分放大器电路输出的模拟值转换为数字值的模数转换器电路 并将转换的数字值输出到控制单元。 控制单元根据从外部设定的输入信号生成驱动信号,根据感应电压检测器检测出的感应电压来调整驱动信号,将驱动单元的调整后的驱动信号设定。
    • 3. 发明授权
    • Latch clock generation circuit and serial-parallel conversion circuit
    • 锁存时钟发生电路和并联转换电路
    • US07310057B2
    • 2007-12-18
    • US11233459
    • 2005-09-22
    • Tsutomu MurataKosaku Hioki
    • Tsutomu MurataKosaku Hioki
    • H03M9/00
    • H03M9/00
    • A serial-parallel conversion circuit in which power consumption is reduced is provided by using a latch clock generation circuit including multiple latch signal generation circuits which outputs a latch signal with a period of an integer multiple of that of a system clock signal. Here, the latch signal generation circuit includes a gate circuit which receives a control signal and a feedback signal, and outputs, according to a combination of the received control signal and feedback signal, a latch signal obtained by inverting a pulse corresponding to one clock of the system clock signal, and an output synchronization circuit which holds the latch signal output from the gate circuit and at the same time outputs the latch signal as a control signal supplied to a gate circuit of a latch signal generation circuit of the succeeding stage and a feedback signal supplied to the gate circuit of the self stage.
    • 通过使用包括多个锁存信号产生电路的锁存时钟产生电路来提供消耗功率降低的串并转换电路,其以系统时钟信号的整数倍的周期输出锁存信号。 这里,锁存信号生成电路包括接收控制信号和反馈信号的门电路,根据接收到的控制信号和反馈信号的组合,输出通过将对应于一个时钟的脉冲反转的锁存信号 系统时钟信号和输出同步电路,其保持从门电路输出的锁存信号,同时输出锁存信号作为提供给后级的锁存信号发生电路的门电路的控制信号,以及 反馈信号提供给自身级的门电路。
    • 5. 发明授权
    • Driver circuit
    • 驱动电路
    • US08508175B2
    • 2013-08-13
    • US12883739
    • 2010-09-16
    • Kosaku Hioki
    • Kosaku Hioki
    • G05B19/00G05B11/00
    • H02P8/12H02P6/187H02P8/16H02P8/34
    • A stepping motor includes two coils. A driver circuit drives the stepping motor by setting dissimilar phases of supply currents to these two coils. One terminal of one coil is connected to ground and another terminal is set to a high impedance state, and an induced voltage generated at that coil is detected as a voltage with respect to ground. Then, in accordance with the state of the detected induced voltage, the magnitude of motor drive current supplied to the two coils is controlled.
    • 步进电机包括两个线圈。 驱动电路通过将不同的电源电流设置到这两个线圈来驱动步进电机。 一个线圈的一个端子连接到地,另一个端子被设置为高阻抗状态,并且在该线圈处产生的感应电压被检测为相对于地的电压。 然后,根据检测出的感应电压的状态,控制提供给两个线圈的电动机驱动电流的大小。
    • 8. 发明申请
    • MOTOR DRIVE CIRCUIT FOR ROTATING A ROTOR BY SUPPLYING THE CURRENTS TO TWO COILS
    • 通过向两个线圈供电来转动转子的电动机驱动电路
    • US20110156631A1
    • 2011-06-30
    • US12978958
    • 2010-12-27
    • Kazumasa TAKAITakeshi NaganumaKosaku HiokiYoshihiro Niwa
    • Kazumasa TAKAITakeshi NaganumaKosaku HiokiYoshihiro Niwa
    • H02P8/12H02P6/08
    • H02P8/36H02P8/22
    • When a driver unit is in a high impedance state as viewed from a first coil or a second coil, an induced voltage detector detects the voltage across the first coil or that across the second coil so as to detect an induced voltage occurring in the first coil or the second coil. The induced voltage detector includes a differential amplifier circuit for differentially amplifying an electric potential across the first coil or that across the second coil, and an analog-to-digital converter circuit for converting an analog value outputted from the differential amplifier circuit into a digital value and outputting the converted digital value to a control unit. The control unit generates a drive signal based on an input signal set externally and adjusts the drive signal in accordance with the induced voltage detected by the induced voltage detector so as to set the adjusted drive signal in the driver unit.
    • 当驱动器单元处于从第一线圈或第二线圈观察到的高阻抗状态时,感应电压检测器检测跨越第一线圈或跨越第二线圈的电压,以便检测在第一线圈中产生的感应电压 或第二线圈。 感应电压检测器包括用于差分放大跨越第一线圈或跨越第二线圈的电位的差分放大器电路和用于将从差分放大器电路输出的模拟值转换为数字值的模数转换器电路 并将转换的数字值输出到控制单元。 控制单元根据从外部设定的输入信号生成驱动信号,根据感应电压检测器检测出的感应电压来调整驱动信号,将驱动单元的调整后的驱动信号设定。
    • 9. 发明申请
    • Latch clock generation circuit and serial-parallel conversion circuit
    • 锁存时钟发生电路和串并转换电路
    • US20060066356A1
    • 2006-03-30
    • US11233459
    • 2005-09-22
    • Tsutomu MurataKosaku Hioki
    • Tsutomu MurataKosaku Hioki
    • H03K19/00
    • H03M9/00
    • A serial-parallel conversion circuit in which power consumption is reduced is provided by using a latch clock generation circuit including multiple latch signal generation circuits which outputs a latch signal with a period of an integer multiple of that of a system clock signal. Here, the latch signal generation circuit includes a gate circuit which receives a control signal and a feedback signal, and outputs, according to a combination of the received control signal and feedback signal, a latch signal obtained by inverting a pulse corresponding to one clock of the system clock signal, and an output synchronization circuit which holds the latch signal output from the gate circuit and at the same time outputs the latch signal as a control signal supplied to a gate circuit of a latch signal generation circuit of the succeeding stage and a feedback signal supplied to the gate circuit of the self stage.
    • 通过使用包括多个锁存信号产生电路的锁存时钟产生电路来提供消耗功率降低的串并转换电路,其以系统时钟信号的整数倍的周期输出锁存信号。 这里,锁存信号生成电路包括接收控制信号和反馈信号的门电路,根据接收到的控制信号和反馈信号的组合,输出通过将对应于一个时钟的脉冲反转的锁存信号 系统时钟信号和输出同步电路,其保持从门电路输出的锁存信号,同时输出锁存信号作为提供给后级的锁存信号发生电路的门电路的控制信号,以及 反馈信号提供给自身级的门电路。