专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07304496B2 Mask-programmable logic device with programmable input/output ports 有权
标题翻译：具有可编程输入/输出端口的面罩可编程逻辑器件
公开(公告)号：US07304496B2
公开(公告)日：2007-12-04
申请号：US11117588
申请日：2005-04-28
申请人： Hee Kong Phoon , Kian Chin Yap
发明人： Hee Kong Phoon , Kian Chin Yap
IPC分类号： H03K19/173 , H03K19/00
CPC分类号： H03K19/17748 , H03K19/17744 , H03K19/17796
摘要： A mask-programmable logic device includes a macrocell having an external input/output port for “place-and-route” programming by addition of metallization layers. A programmable “fixed” layer allows the external input/output port to be isolated from the remainder of the macrocell so that it “floats,” allowing signals to be routed through the external input/output port when the macrocell is not in use, to reduce routing blockages. The macrocell also may have at least one internal input/output port, potentially connected to different logic circuits, and a programmable “fixed” layer that can be used to control which internal input/output port is connected to the external input/output port. By thus allowing multiple logic circuits to share a single external input/output port, routing blockages are reduced.
摘要翻译：掩模可编程逻辑器件包括具有用于通过添加金属化层进行“放置和路由”编程的外部输入/输出端口的宏单元。可编程“固定”层允许外部输入/输出端口与宏单元的其余部分隔离，使其“浮动”，当宏单元未被使用时允许信号通过外部输入/输出端口路由到减少路由阻塞。宏单元还可以具有至少一个可能连接到不同逻辑电路的内部输入/输出端口以及可用于控制哪个内部输入/输出端口连接到外部输入/输出端口的可编程“固定”层。通过这样允许多个逻辑电路共享单个外部输入/输出端口，减少了路由阻塞。

2. 发明授权

US5564117A Computer system including a page printer controller including a single chip supercalar microprocessor with graphical functional units 失效
标题翻译：计算机系统包括页面打印机控制器，其包括具有图形功能单元的单芯片超标准微处理器
公开(公告)号：US5564117A
公开(公告)日：1996-10-08
申请号：US468083
申请日：1995-06-06
申请人： Derek J. Lentz , Johannes Wang , Trevor Deosaran , Linley M. Young , Kian-Chin Yap , Le T. Nguyen , Makoto Matsubayashi , Te-Li Lau
发明人： Derek J. Lentz , Johannes Wang , Trevor Deosaran , Linley M. Young , Kian-Chin Yap , Le T. Nguyen , Makoto Matsubayashi , Te-Li Lau
IPC分类号： B41J5/30 , B41J29/38 , G06F3/12 , G06F9/308 , G06F15/78 , G06K15/00 , G06K15/02 , G06T1/20 , G06F15/16
CPC分类号： G06F9/30018 , G06K15/00 , G06K15/02 , G06K2215/0002 , G06K2215/0005 , G06K2215/004 , G06K2215/0054 , G06K2215/0062 , G06K2215/0071 , G06K2215/0082
摘要： A VLSIC page printer controller includes an instruction processor which responds to a host computer and a printer video processor for accessing data from memory under the control of the instruction processor and serializing data for transfer to a printer through a video port. An I/O interface interconnects the printer controller with an I/O bus to which is connected a host computer, memory devices, and other peripheral devices. An internal memory interface connects the printer controller to memory, and the printer video processor is provided with direct memory access (DMA). Data and instruction caches and an instruction ROM are provided on-chip. A RISC instruction processing unit includes as an integral part thereof the special function, circuits of orthogonal rotator, bit/byte mirror, and pixel modification.
摘要翻译： VLSIC页面打印机控制器包括指令处理器，其响应于主计算机和打印机视频处理器，用于在指令处理器的控制下从存储器访问数据，并串行化数据以通过视频端口传送到打印机。 I / O接口将打印机控制器与连接到主机，存储设备和其他外围设备的I / O总线互连。内部存储器接口将打印机控制器连接到存储器，并且打印机视频处理器具有直接存储器访问（DMA）。数据和指令高速缓存以及指令ROM片上提供。 RISC指令处理单元作为其整体部分包括特殊功能，正交旋转器的电路，位/字节镜和像素修改。

3. 发明授权

US5499384A Input output control unit having dedicated paths for controlling the input and output of data between host processor and external device 失效
标题翻译：输入输出控制单元具有用于控制主处理器和外部设备之间的数据输入和输出的专用路径
公开(公告)号：US5499384A
公开(公告)日：1996-03-12
申请号：US997943
申请日：1992-12-31
申请人： Derek J. Lentz , Kian-Chin Yap
发明人： Derek J. Lentz , Kian-Chin Yap
IPC分类号： G06F13/12 , G06F13/40 , G06F15/02
CPC分类号： G06F13/4018 , G06F13/124
摘要： An I/O controller (IOU) is provided for transferring dam between a host processor and one or more I/O devices. The I/O controller includes means for enabling concurrent performance of two different modes of data transfer between the host processor and the I/O controller. The main memory in the present invention will have its own memory bus while all other I/O devices and memory devices will sit on an external I/O bus. The IOU will interface with a Memory Controller Unit (MCU) to coordinate the data transfer directed to or from the external I/O bus. The I/O Controller also serves as a queuing structure to maximize the memory bandwidth of the memory bus and increase the data flow throughput. The I/O controller serves to provide proper handshaking signals to control the timing and direction of data and address flow.
摘要翻译：提供I / O控制器（IOU），用于在主机处理器和一个或多个I / O设备之间传输大坝。 I / O控制器包括用于实现主机处理器和I / O控制器之间的两种不同模式的数据传输的装置。本发明的主存储器将具有其自己的存储器总线，而所有其它I / O设备和存储器件将位于外部I / O总线上。 IOU将与内存控制器单元（MCU）进行接口，以协调定向到外部I / O总线的数据传输。 I / O控制器还用作排队结构，以最大化存储器总线的存储器带宽并增加数据流量吞吐量。 I / O控制器用于提供适当的握手信号，以控制数据和地址流的时序和方向。

4. 发明授权

US5394515A Page printer controller including a single chip superscalar microprocessor with graphics functional units 失效
标题翻译：页面打印机控制器，包括具有图形功能单元的单芯片超标量微处理器
公开(公告)号：US5394515A
公开(公告)日：1995-02-28
申请号：US267646
申请日：1994-06-28
申请人： Derek J. Lentz , Johannes Wang , Trevor Deosaran , Linley M. Young , Kian-Chin Yap , Le Trong Nguyen , Makoto Matsubayashi , Te-Li Lau
发明人： Derek J. Lentz , Johannes Wang , Trevor Deosaran , Linley M. Young , Kian-Chin Yap , Le Trong Nguyen , Makoto Matsubayashi , Te-Li Lau
IPC分类号： B41J5/30 , B41J29/38 , G06F3/12 , G06F9/308 , G06F15/78 , G06K15/00 , G06K15/02 , G06T1/20 , G06F15/00
CPC分类号： G06F9/30018 , G06K15/00 , G06K15/02 , G06K2215/0002 , G06K2215/0005 , G06K2215/004 , G06K2215/0054 , G06K2215/0062 , G06K2215/0071 , G06K2215/0082
摘要： A VLSIC page printer controller includes an instruction processor which responds to a host computer and a printer video processor for accessing data from memory under the control of the instruction processor and serializing data for transfer to a printer through a video port. An I/O interface interconnects the printer controller with an I/O bus to which is connected a host computer, memory devices, and other peripheral devices. An internal memory interface connects the printer controller to memory, and the printer video processor is provided with direct memory access (DMA). Data and instruction caches and an instruction ROM are provided on-chip. A RISC instruction processing unit includes as an integral part thereof the special function circuits of orthogonal rotator, bit/byte mirror, and pixel modification.
摘要翻译： VLSIC页面打印机控制器包括指令处理器，其响应于主计算机和打印机视频处理器，用于在指令处理器的控制下从存储器访问数据，并串行化数据以通过视频端口传送到打印机。 I / O接口将打印机控制器与连接到主机，存储设备和其他外围设备的I / O总线互连。内部存储器接口将打印机控制器连接到存储器，并且打印机视频处理器具有直接存储器访问（DMA）。数据和指令高速缓存以及指令ROM片上提供。 RISC指令处理单元作为其整体部分包括正交旋转器的特殊功能电路，位/字节镜和像素修改。

5. 发明授权

US08352899B1 Method to modify an integrated circuit (IC) design 失效
标题翻译：修改集成电路（IC）设计的方法
公开(公告)号：US08352899B1
公开(公告)日：2013-01-08
申请号：US12860662
申请日：2010-08-20
申请人： Kian Chin Yap , Phooi Choong Loh , Kar Keng Chua
发明人： Kian Chin Yap , Phooi Choong Loh , Kar Keng Chua
IPC分类号： G06F17/50
CPC分类号： G06F17/5077 , G06F17/505
摘要： A method to modify a first IC design into a second IC design, the first and second IC designs specifying a common interconnection layer with a plurality of interconnections, is disclosed. The method includes identifying an interconnection from plurality of interconnections within the common interconnection layer. The interconnection is unused for routing signals in the first IC design. The metal layer that is coupled with the identified interconnection is removed from the first IC design to generate a modified design. The identified interconnection of the first IC design is placed into one of an invisible state or a temporarily removed state in the modified design. The metal layer in the modified design is routed for a specific logic gate design. The modified design is then stored as the second IC design.
摘要翻译：公开了一种将第一IC设计修改为第二IC设计的方法，第一和第二IC设计指定具有多个互连的公共互连层。该方法包括从公共互连层内的多个互连中识别互连。在第一个IC设计中，互连不用于路由信号。与所识别的互连耦合的金属层从第一IC设计中移除以产生经修改的设计。所确定的第一IC设计的互连被置于修改后的设计中的不可见状态或暂时移除状态之一。修改后的设计中的金属层被路由为特定的逻辑门设计。然后将修改后的设计作为第二个IC设计存储。

6. 发明授权

US5559951A Page printer controller including a single chip superscalar microprocessor with graphics functional units 失效
标题翻译：页面打印机控制器，包括具有图形功能单元的单芯片超标量微处理器
公开(公告)号：US5559951A
公开(公告)日：1996-09-24
申请号：US383015
申请日：1995-02-03
申请人： Derek J. Lentz , Johannes Wang , Trevor Deosaran , Linley M. Young , Kian-Chin Yap , Le Trong Nguyen , Makoto Matsubayashi , Te-Li Lau
发明人： Derek J. Lentz , Johannes Wang , Trevor Deosaran , Linley M. Young , Kian-Chin Yap , Le Trong Nguyen , Makoto Matsubayashi , Te-Li Lau
IPC分类号： B41J5/30 , B41J29/38 , G06F3/12 , G06F9/308 , G06F15/78 , G06K15/00 , G06K15/02 , G06T1/20 , G06F15/16
CPC分类号： G06F9/30018 , G06K15/00 , G06K15/02 , G06K2215/0002 , G06K2215/0005 , G06K2215/004 , G06K2215/0054 , G06K2215/0062 , G06K2215/0071 , G06K2215/0082
摘要： A VLSIC page printer controller includes an instruction processor which responds to a host computer and a printer video processor for accessing data from memory under the control of the instruction processor and serializing data for transfer to a printer through a video port. An I/0 interface interconnects the printer controller with an I/O bus to which is connected a host computer, memory devices, and other peripheral devices. An internal memory interface connects the printer controller to memory, and the printer video processor is provided with direct memory access (DMA). Data and instruction caches and an instruction ROM are provided on-chip. A RISC instruction processing unit includes as an integral part thereof the special function circuits of orthogonal rotator, bit/byte mirror, and pixel modification.
摘要翻译： VLSIC页面打印机控制器包括指令处理器，其响应于主计算机和打印机视频处理器，用于在指令处理器的控制下从存储器访问数据，并串行化数据以通过视频端口传送到打印机。 I / O接口将打印机控制器与连接到主机，存储设备和其他外围设备的I / O总线互连。内部存储器接口将打印机控制器连接到存储器，并且打印机视频处理器具有直接存储器访问（DMA）。数据和指令高速缓存以及指令ROM片上提供。 RISC指令处理单元作为其整体部分包括正交旋转器的特殊功能电路，位/字节镜和像素修改。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式