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    • 1. 发明授权
    • Multiplexing bus controller with input conditioning
    • 多路复用总线控制器与输入调节
    • US5948073A
    • 1999-09-07
    • US87247
    • 1993-07-07
    • Robert M. ChapinKenneth D. RomanoBenjamin D. BrownAnthony M. FrumusaPhillip A. Sciuto
    • Robert M. ChapinKenneth D. RomanoBenjamin D. BrownAnthony M. FrumusaPhillip A. Sciuto
    • G03G21/00G06F13/40G06F13/00
    • G06F13/4022
    • A multiplexing bus controller with input conditioning is provided in which the need for a dedicated microprocessor for handling input filtering, input change detection and serial-to-parallel/parallel-to-serial I/O data conversion is eliminated. The controller is realized in a gate array and provides input data oversampling and output refreshing to eliminate random noise coupled to the data lines. In addition, the oversampled data is filtered to debounce the signal received from the input devices. The input data is converted from serial-to-parallel and checked to detect any change from the previous input data stream. Upon detection of an input change, the host microprocessor is interrupted. When the host microprocessor sends data to the bus controller, the bus controller then converts the data to a serial stream for communication to the appropriate output device. Additionally, the bus controller is provided with an internal turnaround circuit to loop back outputs to the inputs for diagnostic purposes. Very low gate counts realized in the design of the multiplexing bus controller allow it to be realized on a single chip.
    • 提供了一种具有输入调节功能的复用总线控制器,其中消除了用于处理输入滤波,输入变化检测和串并行/并 - 串行I / O数据转换的专用微处理器的需要。 控制器在门阵列中实现,并提供输入数据过采样和输出刷新,以消除耦合到数据线的随机噪声。 另外,对过采样数据进行滤波以去除从输入设备接收的信号。 输入数据从串行到并行转换,并检查以检测来自先前输入数据流的任何变化。 当检测到输入变化时,主微处理器被中断。 当主机微处理器向总线控制器发送数据时,总线控制器然后将数据转换为串行流,以通信到适当的输出设备。 此外,总线控制器设置有内部周转电路,用于将输出回送到输入用于诊断目的。 在多路复用总线控制器的设计中实现的非常低的门计数允许其在单个芯片上实现。
    • 4. 发明授权
    • Apparatus and method for encoding and reconstructing image data
    • 用于编码和重建图像数据的装置和方法
    • US5659634A
    • 1997-08-19
    • US315275
    • 1994-09-29
    • Thomas I. YehFrancis K. TseAnthony M. FrumusaAron NacmanKenneth D. Romano
    • Thomas I. YehFrancis K. TseAnthony M. FrumusaAron NacmanKenneth D. Romano
    • B41J5/30G06T1/00H04N1/411G06K9/36
    • H04N1/411
    • An apparatus for processing an input image, represented by an input bit stream including a plurality of first bit sets, is provided. The apparatus includes a device for processing the input bit stream in such a manner that each of the first bit sets is represented by a second bit set with each of the second bit sets having less bits than each of the first bit sets and a selected number of bits in the input bit stream, corresponding to image-related information, being discarded as a result of the encoding. The apparatus is provided with an electronic volatile memory for storing a resulting encoded bit stream and a bit stream analyzer for analyzing the stored encoded bit stream to generate positional signals. The apparatus is further provided with a reconstruction circuit for reconstructing the stored encoded bit stream, by reference to the positional signals. The reconstruction circuit operates in such a manner that, upon outputting an image representation of the reconstructed bit stream, the outputted image includes at least a part of the discarded, image-related information.
    • 提供一种用于处理由包括多个第一位组的输入比特流表示的输入图像的装置。 该装置包括用于以这样的方式处理输入比特流的装置,即每个第一比特组由第二比特组表示,其中每个第二比特组具有比每个第一比特组少的比特, 与图像相关的信息对应的输入比特流中的比特被作为编码的结果被丢弃。 该装置设置有用于存储所得到的编码比特流的电子易失性存储器和用于分析所存储的编码比特流以产生位置信号的比特流分析器。 该装置还设置有重建电路,用于通过参考位置信号重建存储的编码比特流。 重建电路以这样的方式工作,即在输出重构位流的图像表示时,输出的图像至少包括丢弃的图像相关信息的一部分。