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1. 发明授权

US5019877A Field effect transistor 失效
标题翻译：场效应晶体管
公开(公告)号：US5019877A
公开(公告)日：1991-05-28
申请号：US493725
申请日：1990-03-15
申请人： Kenji Hosogi
发明人： Kenji Hosogi
IPC分类号： H01L21/28 , H01L29/423
CPC分类号： H01L21/28 , H01L29/42316
摘要： A field effect transistor for microwave and millimeter wave frequencies includes a plurality of feeding points on a gate finger extending on a substrate, an airbridge wiring structure which connects adjacent feeding points with each other, and a gate pad beyond the source and drain electrodes connected with the gate finger through the airbridge. The relatively wide gate connection reduces gate resistance. The gate connection does not cross the source and drain electrodes, reducing capacitance. The reduced resistance and capacitance significantly improve the high frequency noise figure.
摘要翻译：用于微波和毫米波频率的场效应晶体管包括在基板上延伸的栅极指状上的多个馈电点，将相邻馈电点彼此连接的气桥布线结构，以及与源极和漏极连接的栅极焊盘门指通过空中桥梁。相对宽的栅极连接减小了栅极电阻。栅极连接不会越过源极和漏极，从而降低电容。降低的电阻和电容显着提高了高频噪声系数。

2. 发明授权

US06921718B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06921718B2
公开(公告)日：2005-07-26
申请号：US10408258
申请日：2003-04-08
申请人： Naoto Andoh , Takao Ishida , Kenji Hosogi
发明人： Naoto Andoh , Takao Ishida , Kenji Hosogi
IPC分类号： H01L23/52 , H01L21/3205 , H01L21/768 , H01L21/311
CPC分类号： H01L21/76898
摘要： A semiconductor device includes a semiconductor substrate and an electrode disposed on a major surface of the semiconductor substrate. A via hole is formed on a center of the electrode so as to open from a surface of the electrode to a place under the surface of the semiconductor substrate. A via-hole foundation electrode for inhibiting diffusion from a metal layer is formed inside the via hole and on the surface of the electrode, a via-hole electrode is formed on the surface of the via-hole foundation electrode. A back via hole is formed on the back of the semiconductor substrate opposite to the major surface thereof, and opened from the back of the semiconductor substrate to the via-hole electrode. A back via-hole electrode is formed on the back of the semiconductor substrate including the inside of the back via hole.
摘要翻译：半导体器件包括半导体衬底和设置在半导体衬底的主表面上的电极。在电极的中心形成通孔，从电极的表面向半导体衬底的表面下方的位置开口。在通孔内形成有用于抑制从金属层扩散的通孔基础电极，在电极表面上，在通孔基础电极的表面上形成通孔电极。在半导体衬底的与其主表面相对的背面上形成背部通孔，并且从半导体衬底的背面开口到通孔电极。背部通孔电极形成在包括背部通孔内侧的半导体衬底的背面上。

3. 发明授权

US5728611A Method of fabricating semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US5728611A
公开(公告)日：1998-03-17
申请号：US630471
申请日：1996-04-10
申请人： Takayuki Hisaka , Kenji Hosogi , Naohito Yoshida
发明人： Takayuki Hisaka , Kenji Hosogi , Naohito Yoshida
IPC分类号： H01L21/28 , H01L21/265 , H01L21/338 , H01L29/08 , H01L29/423 , H01L29/812
CPC分类号： H01L29/66878 , H01L21/26586 , H01L29/0891 , H01L29/42316
摘要： A method of producing a semiconductor device includes preparing a semiconductor ingot having a (100) surface orientation and an orientation flat in a �011! direction; cutting the semiconductor ingot in a plane which is obtained by tilting the (100) surface by an angle .theta. about an axis of the tilting, obtained by rotating the �011! direction by an angle .phi. with the center of the (100) surface as an axis of the rotation, thereby producing a semiconductor wafer having a surface; producing a channel region in the semiconductor wafer; producing a refractory metal gate on the surface of the semiconductor wafer; and using the refractory metal gate as a mask, implanting dopant impurity ions into the semiconductor wafer in a direction perpendicular to the surface of the semiconductor wafer, thereby producing impurity-implanted regions in the semiconductor wafer. Channeling is prevented and the short-channel effect is suppressed.
摘要翻译：一种制造半导体器件的方法包括制备具有（100）表面取向并且在[01 + E，ov1 + EE]方向上取向平坦的半导体锭; 在通过使[01 + E，ov1 + EE]方向与中心旋转角度phi而获得的平面中切割半导体锭，该平面是通过将（100）表面倾斜角度θ绕倾斜轴线的（100）表面作为旋转轴，从而制造具有表面的半导体晶片; 在半导体晶片中产生沟道区; 在半导体晶片的表面上形成难熔金属栅极; 并且使用难熔金属栅极作为掩模，在垂直于半导体晶片的表面的方向上将掺杂杂质离子注入到半导体晶片中，从而在半导体晶片中产生杂质注入区域。防止通道化，抑制短通道效应。

4. 发明授权

US5449929A IPG transistor semiconductor integrated circuit device 失效
标题翻译： IPG晶体管半导体集成电路器件
公开(公告)号：US5449929A
公开(公告)日：1995-09-12
申请号：US169141
申请日：1993-12-20
申请人： Kenji Hosogi
发明人： Kenji Hosogi
IPC分类号： H01L29/812 , H01L21/335 , H01L21/338 , H01L29/06 , H01L29/775 , H01L29/778 , H01L29/80
CPC分类号： B82Y10/00 , H01L29/66469 , H01L29/775
摘要： A method of producing on a substrate an in-plane-gate transistor includes producing a channel portion in which a quasi-one-dimensional conductive channel electrically connecting a source region and a drain region is generated and producing gate portions, each portion including a gate electrode layer for controlling generation and forfeiture of the quasi-one-dimensional conductive channel so that an upper surface of the gate layer and the quasi-one-dimensional conductive channel are positioned substantially in the same plane, on both sides of the channel portion on the substrate. Gaps between the channel portion and the gate portions are controlled by side walls produced self-aligningly on the side wall surfaces of the channel portion. Thus, gaps of a high aspect ratio can be produced between the channel portion and the gate portions without being limited by the dry etching technique.
摘要翻译：一种在衬底上制造面内栅极晶体管的方法，包括制造其中产生电连接源极区和漏极区的准一维导电沟道并产生栅极部分的沟道部分，每个部分包括栅极电极层，用于控制准一维导电通道的产生和没收，使得栅极层和准一维导电沟道的上表面基本上位于同一平面上，在沟道部分的两侧上底物。通道部分和门部分之间的间隙由通道部分的侧壁表面上自对准地产生的侧壁来控制。因此，可以在通道部分和栅极部分之间产生高纵横比的间隙，而不受干蚀刻技术的限制。

5. 发明授权

US5245247A Microminiature vacuum tube 失效
标题翻译：微生物真空管
公开(公告)号：US5245247A
公开(公告)日：1993-09-14
申请号：US644995
申请日：1991-01-22
申请人： Kenji Hosogi
发明人： Kenji Hosogi
IPC分类号： H01J3/02 , H01J9/02 , H01J19/24 , H01J21/10
CPC分类号： H01J3/022 , H01J21/105 , H01J9/025
摘要： A microminiature vacuum tube and a process for fabrication thereof. The tube is formed on a compound semiconductor substrate using solid state semiconductor fabrication techniques. A straight line path for electron flow is provided by forming an emitter and collector in the same plane. The emitter and collector are formed in a low resistance layer of a compound semiconductor substrate, such as by etching a recess through the low resistance layer and into the substrate to define a separate emitter and collector. Preferential etching techniques are utilized to form a sharp-edge in at least the emitter portion of the recess. A gate is formed in the recess proximate to but out of the plane for electron flow. The use of microminiature solid state fabrication technique allows the recess to be formed at submicron size to reduce the voltage requirements on the microminiature vacuum tube.
摘要翻译：微型真空管及其制造方法。使用固态半导体制造技术在复合半导体衬底上形成管。通过在同一平面内形成发射极和集电极来提供电子流的直线路径。发射极和集电极形成在化合物半导体衬底的低电阻层中，例如通过蚀刻通过低电阻层的凹槽并进入衬底以限定单独的发射极和集电极。利用优选蚀刻技术在至少凹部的发射极部分中形成尖锐边缘。在靠近但离开平面的凹槽中形成栅极用于电子流动。使用微型固态制造技术允许凹陷以亚微米尺寸形成以降低对微型真空管的电压要求。

6. 发明授权

US5886373A Field effect transistor 失效
标题翻译：场效应晶体管
公开(公告)号：US5886373A
公开(公告)日：1999-03-23
申请号：US890517
申请日：1997-07-09
申请人： Kenji Hosogi
发明人： Kenji Hosogi
IPC分类号： H01L21/285 , H01L21/338 , H01L29/812 , H01L29/80
CPC分类号： H01L29/66863 , H01L21/28587 , H01L29/8128
摘要： A method of fabricating a field effect transistor with a spike-gate structure including forming a semiconductor layer on a semi-insulating substrate, and forming a recess having a spike shape in which a portion of a gate electrode projects into the semiconductor layer, in the semiconductor layer. The formation of the recess includes forming a narrow damaged layer in the semiconductor layer by one of focused ion beamion implantation and ion implantation; and wet-etching the semiconductor layer utilizing accelerated etching of the damaged layer, thereby forming a recess having a spike groove. As described above, without performing the complicated processes as in the prior art fabricating method shown in FIGS. 12(a)-12(i), by performing one FIB implantation process, an FET with a spike-gate structure can be fabricated by using simpler and fewer processes.
摘要翻译：一种制造具有尖峰栅极结构的场效应晶体管的方法，包括在半绝缘衬底上形成半导体层，并且形成具有尖端形状的凹部，其中栅电极的一部分突出到半导体层中，在半导体层。凹陷的形成包括通过聚焦离子束离子注入和离子注入之一在半导体层中形成窄的损伤层; 并利用加速蚀刻损伤层湿法蚀刻半导体层，从而形成具有尖峰凹槽的凹槽。如上所述，不进行与图1和图2所示的现有技术制造方法相同的复杂处理。如图12（a）-12（i）所示，通过执行一个FIB注入工艺，可以通过使用更简单和更少的工艺来制造具有尖峰栅极结构的FET。

7. 发明授权

US5267884A Microminiature vacuum tube and production method 失效
标题翻译：微型真空管及生产方法
公开(公告)号：US5267884A
公开(公告)日：1993-12-07
申请号：US35686
申请日：1993-03-23
申请人： Kenji Hosogi
发明人： Kenji Hosogi
IPC分类号： H01J3/02 , H01J9/02 , H01J21/10
CPC分类号： H01J9/025 , H01J21/105 , H01J3/022
摘要： A microminiature vacuum tube and a process for fabrication thereof. The tube is formed on a compound semiconductor substrate using solid state semiconductor fabrication techniques. A straight line path for electron flow is provided by forming an emitter and collector in the same plane. The emitter and collector are formed in a low resistance layer of a compound semiconductor substrate, such as by etching a recess through the low resistance layer and into the substrate to define a separate emitter and collector. Preferential etching techniques are utilized to form a sharp-edge in at least the emitter portion of the recess. A gate is formed in the recess proximate to but out of the plane for electron flow. The use of microminiature solid state fabrication technique allows the recess to be formed at submicron size to reduce the voltage requirements on the microminiature vacuum tube.
摘要翻译：微型真空管及其制造方法。使用固态半导体制造技术在复合半导体衬底上形成管。通过在同一平面内形成发射极和集电极来提供电子流的直线路径。发射极和集电极形成在化合物半导体衬底的低电阻层中，例如通过蚀刻通过低电阻层的凹槽并进入衬底以限定单独的发射极和集电极。利用优选蚀刻技术在至少凹部的发射极部分中形成尖锐边缘。在靠近但离开平面的凹槽中形成栅极用于电子流动。使用微型固态制造技术允许凹陷以亚微米尺寸形成以降低对微型真空管的电压要求。

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