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1. 发明授权

US09701937B2 Carrier for cultivation of cells 有权
公开(公告)号：US09701937B2
公开(公告)日：2017-07-11
申请号：US12319330
申请日：2009-01-06
申请人： Ken Nakata , Kanae Kasai
发明人： Ken Nakata , Kanae Kasai
IPC分类号： C12N5/00
CPC分类号： C12N5/0068 , C12N2533/54
摘要： A carrier for cell cultivation having stress of 10-30 kPa at 10% load, preparing a material, which has physical property similar to cartilage tissue of vivo, by lyophilization using high concentrated collagen dispersion, solution or mixture thereof as a starting material, then performing insolubilizing treatment to regulate physical strength and absorption speed in a living body.

2. 发明授权

US08993416B2 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08993416B2
公开(公告)日：2015-03-31
申请号：US13194565
申请日：2011-07-29
申请人： Keiichi Yui , Ken Nakata , Isao Makabe , Hiroyuki Ichikawa
发明人： Keiichi Yui , Ken Nakata , Isao Makabe , Hiroyuki Ichikawa
IPC分类号： H01L21/20 , H01L21/02 , H01L29/20 , H01L29/778
CPC分类号： H01L21/02647 , H01L21/02378 , H01L21/02458 , H01L21/02502 , H01L21/0254 , H01L21/0262 , H01L29/2003 , H01L29/7786
摘要： A method of manufacturing a semiconductor device includes growing a first GaN layer on a SiC substrate, and forming a second GaN layer on the first GaN layer, the second GaN layer being grown under such conditions that a ratio of a vertical growth rate to a horizontal growth rate is lower than that in the growth of the first GaN layer.
摘要翻译：制造半导体器件的方法包括在SiC衬底上生长第一GaN层，并在第一GaN层上形成第二GaN层，第二GaN层在垂直生长速率与水平面的比例生长速率低于第一GaN层的生长速率。

3. 发明授权

US08227810B2 Semiconductor device and method for manufacturing same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08227810B2
公开(公告)日：2012-07-24
申请号：US13126569
申请日：2010-07-09
申请人： Masaya Okada , Makoto Kiyama , Seiji Yaegashi , Ken Nakata
发明人： Masaya Okada , Makoto Kiyama , Seiji Yaegashi , Ken Nakata
IPC分类号： H01L29/15
CPC分类号： H01L29/8725 , H01L21/8252 , H01L27/0605 , H01L27/0727 , H01L29/0692 , H01L29/2003 , H01L29/7786 , H01L29/7788 , H01L29/7789 , H01L29/8128 , H01L29/872
摘要： There are provided a semiconductor device that includes a bypass protection unit against surge voltage or the like, achieves good withstand voltage characteristics and low on-resistance (low On-state voltage), has a simple structure, and is used for large-current purpose and a method for producing the semiconductor device.In the present invention, the semiconductor device includes an n+-type GaN substrate 1 having a GaN layer that is in ohmic contact with a supporting substrate, a FET having an n−-type GaN drift layer 2 in a first region R1, and an SBD having an anode electrode in a second region R2, the anode electrode being in Schottky contact with the n−-type GaN drift layer 2. The FET and the SBD are arranged in parallel. A drain electrode D of the FET and a cathode electrode C of the SBD are formed on the back of the n+-type GaN substrate 1.
摘要翻译：提供了一种具有抗浪涌电压等的旁路保护单元的半导体器件，具有良好的耐压特性和低导通电阻（低导通电压），结构简单，用于大电流目的以及半导体装置的制造方法。在本发明中，半导体器件包括具有与支撑衬底欧姆接触的GaN层的n +型GaN衬底1，在第一区域R1中具有n型GaN漂移层2的FET和 SBD在第二区域R2中具有阳极电极，阳极与n型GaN漂移层2肖特基接触.FET和SBD平行布置。 FET的漏电极D和SBD的阴极电极C形成在n +型GaN衬底1的背面。

4. 发明申请

US20120001195A1 SEMICONDUCTOR SUBSTRATE AND SEMICONDUCTOR DEVICE 有权
标题翻译：半导体衬底和半导体器件
公开(公告)号：US20120001195A1
公开(公告)日：2012-01-05
申请号：US13172426
申请日：2011-06-29
申请人： Isao Makabe , Keiichi Yui , Ken Nakata , Takamitsu Kitamura
发明人： Isao Makabe , Keiichi Yui , Ken Nakata , Takamitsu Kitamura
IPC分类号： H01L29/02
CPC分类号： H01L29/7787 , H01L29/2003 , H01L29/66462
摘要： A semiconductor substrate inclu8des an AlN layer that is formed so as to contact a Si substrate and has an FWMH of a rocking curve of a (002) plane by x-ray diffraction, the FWMH being less than or equal to 1500 seconds, and a GaN-based semiconductor layer formed on the AlN layer.
摘要翻译：半导体衬底包括形成为与Si衬底接触并且通过x射线衍射具有（002）面的摇摆曲线的FWMH，FWMH小于或等于1500秒的AlN层，以及形成在AlN层上的GaN基半导体层。

5. 发明授权

US07968335B2 Cell culturing method using biomechanical stimulation loading and system therefor 有权
标题翻译：使用生物力学刺激装载的细胞培养方法及其系统
公开(公告)号：US07968335B2
公开(公告)日：2011-06-28
申请号：US11629619
申请日：2005-06-16
申请人： Ken Nakata
发明人： Ken Nakata
IPC分类号： C12N5/00
CPC分类号： C12M35/04 , C12M23/50 , C12M41/14
摘要： A cell culturing method employing biomechanical stimulation loading and a system for applying, in in vitro culture, stimulation similar to vertical weight load stimulation or sideward shear stress stimulation acting on tissues in an aboveground living body as repeated biomechanical stimulation to culture cells, culture tissues or a construct including the culture cells. The system includes a mechanical stimulation loading device and a culture receptacle that are placed in a carbon dioxide incubator, and a control computer. The device includes a weight loading piston, a piston raising and lowering stage supporting piston to allow vertical movement of a piston within a designated range, and a stage lifting and lowering mechanism for vertically moving the stage. A computer drives the mechanism in a specified cycle to effect the vertical movement of the stage. When the stage is lowered, a culture in the receptacle is weighted with the piston.
摘要翻译：使用生物力学刺激加载的细胞培养方法和用于在体外培养中应用类似于在地上生物体中的组织上作用的垂直重量负荷刺激或侧向剪切应力刺激的刺激的系统，作为对培养细胞，培养组织或重复的生物力学刺激的系统包括培养细胞的构建体。该系统包括放置在二氧化碳培养箱中的机械刺激加载装置和培养容器以及控制计算机。该装置包括重量装载活塞，活塞升降台支撑活塞以允许活塞在指定范围内的垂直运动，以及用于垂直移动平台的台升降机构。计算机在指定的周期内驱动机构以实现平台的垂直运动。当舞台下降时，容器中的培养物用活塞加重。

6. 发明授权

US08754419B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08754419B2
公开(公告)日：2014-06-17
申请号：US13171627
申请日：2011-06-29
申请人： Ken Nakata , Isao Makabe , Keiichi Yui , Takamitsu Kitamura
发明人： Ken Nakata , Isao Makabe , Keiichi Yui , Takamitsu Kitamura
IPC分类号： H01L29/78
CPC分类号： H01L29/7787 , H01L29/2003 , H01L29/66462
摘要： A semiconductor device includes a Si substrate having a principal plane that is a crystal surface inclined at an off angle of 0.1 degrees or less with respect to a (111) plane, an AlN layer that is provided so as to contact the principal plane of the Si substrate and is configured so that an FWHM of a rocking curve of a (002) plane by x-ray diffraction is not greater than 2000 seconds, and a GaN-based semiconductor layer formed on the AlN layer.
摘要翻译：半导体器件包括具有相对于（111）面倾斜偏离0.1度以下的晶体面的主面的Si衬底，设置成与（111）面接触的主面的AlN层 Si衬底并且被配置为使得通过x射线衍射的（002）面的摆动曲线的FWHM不大于2000秒，以及形成在AlN层上的GaN基半导体层。

7. 发明授权

US08748274B2 Method for fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08748274B2
公开(公告)日：2014-06-10
申请号：US12640347
申请日：2009-12-17
申请人： Ken Nakata , Seiji Yaegashi
发明人： Ken Nakata , Seiji Yaegashi
IPC分类号： H01L21/336 , H01L29/778 , H01L29/423 , H01L29/51 , H01L29/20
CPC分类号： H01L29/7789 , H01L29/2003 , H01L29/4236 , H01L29/513 , H01L29/517 , H01L29/7787 , H01L29/7788
摘要： A method for fabricating a semiconductor device includes: forming a GaN-based semiconductor layer on a substrate; forming a gate insulating film of aluminum oxide on the GaN-based semiconductor layer at a temperature equal to or lower than 450° C.; forming a protection film on an upper surface of the gate insulating film; performing a process with an alkaline solution in a state in which the upper surface of the gate insulating film is covered with the protection film; and forming a gate electrode on the gate insulating film.
摘要翻译：一种制造半导体器件的方法包括：在衬底上形成GaN基半导体层; 在等于或低于450℃的温度下在GaN基半导体层上形成氧化铝的栅极绝缘膜; 在所述栅极绝缘膜的上表面上形成保护膜; 在栅极绝缘膜的上表面被保护膜覆盖的状态下用碱性溶液进行处理; 以及在所述栅极绝缘膜上形成栅电极。

8. 发明授权

US08525184B2 Semiconductor device and method for manufacturing same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08525184B2
公开(公告)日：2013-09-03
申请号：US13531279
申请日：2012-06-22
申请人： Masaya Okada , Makato Kiyama , Seiji Yaegashi , Ken Nakata
发明人： Masaya Okada , Makato Kiyama , Seiji Yaegashi , Ken Nakata
IPC分类号： H01L29/15
CPC分类号： H01L29/8725 , H01L21/8252 , H01L27/0605 , H01L27/0727 , H01L29/0692 , H01L29/2003 , H01L29/7786 , H01L29/7788 , H01L29/7789 , H01L29/8128 , H01L29/872
摘要： There are provided a semiconductor device that includes a bypass protection unit against surge voltage or the like, achieves good withstand voltage characteristics and low on-resistance (low On-state voltage), has a simple structure, and is used for large-current purpose and a method for producing the semiconductor device.In the present invention, the semiconductor device includes an n+-type GaN substrate 1 having a GaN layer that is in ohmic contact with a supporting substrate, a FET having an n−-type GaN drift layer 2 in a first region R1, and an SBD having an anode electrode in a second region R2, the anode electrode being in Schottky contact with the d−-type GaN drift layer 2. The FET and the SBD are arranged in parallel. A drain electrode D of the FET and a cathode electrode C of the SBD are formed on the back of the n+-type GaN substrate 1.
摘要翻译：提供了一种具有抗浪涌电压等的旁路保护单元的半导体器件，具有良好的耐压特性和低导通电阻（低导通电压），结构简单，用于大电流目的以及半导体装置的制造方法。在本发明中，半导体器件包括具有与支撑衬底欧姆接触的GaN层的n +型GaN衬底1，在第一区域R1中具有n型GaN漂移层2的FET和 SBD在第二区域R2中具有阳极电极，阳极与d型GaN漂移层2肖特基接触.FET和SBD平行布置。 FET的漏电极D和SBD的阴极电极C形成在n +型GaN衬底1的背面。

9. 发明申请

US20120273797A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120273797A1
公开(公告)日：2012-11-01
申请号：US13531279
申请日：2012-06-22
申请人： Masaya Okada , Makoto Kiyama , Seiji Yaegashi , Ken Nakata
发明人： Masaya Okada , Makoto Kiyama , Seiji Yaegashi , Ken Nakata
IPC分类号： H01L29/20
CPC分类号： H01L29/8725 , H01L21/8252 , H01L27/0605 , H01L27/0727 , H01L29/0692 , H01L29/2003 , H01L29/7786 , H01L29/7788 , H01L29/7789 , H01L29/8128 , H01L29/872
摘要： There are provided a semiconductor device that includes a bypass protection unit against surge voltage or the like, achieves good withstand voltage characteristics and low on-resistance (low On-state voltage), has a simple structure, and is used for large-current purpose and a method for producing the semiconductor device.In the present invention, the semiconductor device includes an n+-type GaN substrate 1 having a GaN layer that is in ohmic contact with a supporting substrate, a FET having an n−-type GaN drift layer 2 in a first region R1, and an SBD having an anode electrode in a second region R2, the anode electrode being in Schottky contact with the d−-type GaN drift layer 2. The FET and the SBD are arranged in parallel. A drain electrode D of the FET and a cathode electrode C of the SBD are formed on the back of the n+-type GaN substrate 1.
摘要翻译：提供了一种具有抗浪涌电压等的旁路保护单元的半导体器件，具有良好的耐压特性和低导通电阻（低导通电压），结构简单，用于大电流目的以及半导体装置的制造方法。在本发明中，半导体器件包括具有与支撑衬底欧姆接触的GaN层的n +型GaN衬底1，在第一区域R1中具有n型GaN漂移层2的FET和 SBD在第二区域R2中具有阳极电极，阳极与d型GaN漂移层2肖特基接触.FET和SBD平行布置。 FET的漏电极D和SBD的阴极电极C形成在n +型GaN衬底1的背面。

10. 发明申请

US20120025206A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20120025206A1
公开(公告)日：2012-02-02
申请号：US13192766
申请日：2011-07-28
申请人： Ken Nakata , Isao Makabe , Keiichi Yui
发明人： Ken Nakata , Isao Makabe , Keiichi Yui
IPC分类号： H01L29/161
CPC分类号： H01L29/7787 , H01L21/02378 , H01L21/02458 , H01L21/02505 , H01L21/0254 , H01L21/0262 , H01L29/2003 , H01L29/66462
摘要： A semiconductor device includes a first GaN layer provided on a SIC substrate, a second GaN layer provided on the first GaN layer, and an electron supply layer that is provided on the second GaN layer and has a band gap greater than that of GaN, the first GaN layer having an acceptor concentration higher than that of the second GaN layer.
摘要翻译：半导体器件包括设置在SIC衬底上的第一GaN层，设置在第一GaN层上的第二GaN层和设置在第二GaN层上并具有大于GaN的带隙的电子供给层，第一GaN层的受主浓度高于第二GaN层的受主浓度。

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