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1. 发明授权

US09465632B2 Parallel hardware hypervisor for virtualizing application-specific supercomputers 有权
公开(公告)号：US09465632B2
公开(公告)日：2016-10-11
申请号：US13366318
申请日：2012-02-04
申请人： Kemal Ebcioglu , Atakan Dogan , Reha Oguz Altug , Mikko Herman Lipasti , Eray Özkural
发明人： Kemal Ebcioglu , Atakan Dogan , Reha Oguz Altug , Mikko Herman Lipasti , Eray Özkural
IPC分类号： G06F9/455 , G06F15/78
CPC分类号： G06F9/45533 , G06F9/45558 , G06F9/5077 , G06F15/7871 , G06F2009/4557 , Y02D10/12 , Y02D10/13 , Y02D10/26 , Y02D10/28
摘要： A parallel hypervisor system for virtualizing application-specific supercomputers is disclosed. The hypervisor system comprises (a) at least one software-virtual hardware pair consisting of a software application, and an application-specific virtual supercomputer for accelerating the said software application, wherein (i) The virtual supercomputer contains one or more virtual tiles; and (ii) The software application and the virtual tiles communicate among themselves with messages; (b) One or more reconfigurable physical tiles, wherein each virtual tile of each supercomputer can be implemented on at least one physical tile, by configuring the physical tile to perform the virtual tile's function; and (c) A scheduler implemented substantially in hardware, for parallel pre-emptive scheduling of the virtual tiles on the physical tiles.

2. 发明授权

US10146516B2 Method and system for converting a single-threaded software program into an application-specific supercomputer 有权
公开(公告)号：US10146516B2
公开(公告)日：2018-12-04
申请号：US15257319
申请日：2016-09-06
申请人： Kemal Ebcioglu , Emre Kultursay
发明人： Kemal Ebcioglu , Emre Kultursay
IPC分类号： G06F8/41 , G06F8/40 , G06F9/52 , G06F17/50 , G06F15/173
摘要： The invention comprises (i) a compilation method for automatically converting a single-threaded software program into an application-specific supercomputer, and (ii) the supercomputer system structure generated as a result of applying this method. The compilation method comprises: (a) Converting an arbitrary code fragment from the application into customized hardware whose execution is functionally equivalent to the software execution of the code fragment; and (b) Generating interfaces on the hardware and software parts of the application, which (i) Perform a software-to-hardware program state transfer at the entries of the code fragment; (ii) Perform a hardware-to-software program state transfer at the exits of the code fragment; and (iii) Maintain memory coherence between the software and hardware memories. If the resulting hardware design is large, it is divided into partitions such that each partition can fit into a single chip. Then, a single union chip is created which can realize any of the partitions.

3. 发明授权

US08966457B2 Method and system for converting a single-threaded software program into an application-specific supercomputer 有权
公开(公告)号：US08966457B2
公开(公告)日：2015-02-24
申请号：US13296232
申请日：2011-11-15
申请人： Kemal Ebcioglu , Emre Kultursay , Mahmut Taylan Kandemir
发明人： Kemal Ebcioglu , Emre Kultursay , Mahmut Taylan Kandemir
IPC分类号： G06F9/45 , G06F17/50
CPC分类号： G06F8/4452 , G06F8/40 , G06F8/452 , G06F9/52 , G06F15/17381 , G06F17/5045 , G06F17/5072 , G06F2217/68
摘要： The invention comprises (i) a compilation method for automatically converting a single-threaded software program into an application-specific supercomputer, and (ii) the supercomputer system structure generated as a result of applying this method. The compilation method comprises: (a) Converting an arbitrary code fragment from the application into customized hardware whose execution is functionally equivalent to the software execution of the code fragment; and (b) Generating interfaces on the hardware and software parts of the application, which (i) Perform a software-to-hardware program state transfer at the entries of the code fragment; (ii) Perform a hardware-to-software program state transfer at the exits of the code fragment; and (iii) Maintain memory coherence between the software and hardware memories. If the resulting hardware design is large, it is divided into partitions such that each partition can fit into a single chip. Then, a single union chip is created which can realize any of the partitions.

4. 发明申请

US20050132139A1 Runtime register allocator 失效
标题翻译：运行时寄存器分配器
公开(公告)号：US20050132139A1
公开(公告)日：2005-06-16
申请号：US10732656
申请日：2003-12-10
申请人： Kartik Agaram , Marc Auslander , Kemal Ebcioglu
发明人： Kartik Agaram , Marc Auslander , Kemal Ebcioglu
IPC分类号： G06F9/38 , G06F12/00 , G06F12/08
CPC分类号： G06F9/383 , G06F9/3832 , G06F12/0862
摘要： Methods and arrangements for accessing a storage structure. Included are an arrangement for providing a storage access instruction, an arrangement for inputting an address into a storage structure data cache responsive to a storage access instruction, an arrangement for extending a storage access instruction with a predicted register number field, the predicted register number field containing a predicted register number corresponding to a speculative location of a load/store operand associated with a storage access instruction, an arrangement for speculatively accessing a storage structure with a storage access instruction extended by the extending arrangement, and an arrangement for reverting to the arrangement for inputting an address if the load/store operand is not in the speculative location.
摘要翻译：访问存储结构的方法和布置。包括用于提供存储访问指令的装置，用于响应于存储访问指令将地址输入存储结构数据高速缓存的布置，用于扩展具有预测寄存器号字段的存储访问指令的布置，预测寄存器号字段包含对应于与存储访问指令相关联的加载/存储操作数的推测位置的预测寄存器编号，用于通过扩展装置扩展的存储访问指令来推测访问存储结构的布置，以及用于恢复到布置如果加载/存储操作数不在投机位置，则输入地址。

5. 发明授权

US5721854A Method and apparatus for dynamic conversion of computer instructions 失效
标题翻译：计算机指令的动态转换方法和装置
公开(公告)号：US5721854A
公开(公告)日：1998-02-24
申请号：US703804
申请日：1996-08-27
申请人： Mahmut Kemal Ebcioglu , Randall Dean Groves
发明人： Mahmut Kemal Ebcioglu , Randall Dean Groves
IPC分类号： G06F9/318 , G06F9/38 , G06F9/45
CPC分类号： G06F9/3017 , G06F9/3853 , G06F9/3885
摘要： An instruction cache design which converts a sequential instruction stream into a compound format in the instruction cache. The conversion from sequential instructions to compound instructions is performed by an instruction stream interpreter unit (ISU), which is placed between the instruction cache and main memory. The conversion process is performed when an instruction cache miss occurs. Each line in the instruction cache contains a single compound instruction. The format of this compound instruction is transparent to programmers and will vary depending on the number of execution units which are to be supported.
摘要翻译：指令高速缓存设计，其将顺序指令流转换为指令高速缓存中的复合格式。从顺序指令到复合指令的转换由位于指令高速缓存和主存储器之间的指令流解释器单元（ISU）执行。当指令高速缓存未命中时执行转换处理。指令高速缓存中的每一行包含单个复合指令。该复合指令的格式对程序员是透明的，并且将根据要支持的执行单元的数量而有所不同。

6. 发明申请

US20190004836A1 Parallel hardware hypervisor for virtualizing application-specific supercomputers 审中-公开
公开(公告)号：US20190004836A1
公开(公告)日：2019-01-03
申请号：US16105741
申请日：2018-08-20
申请人： Kemal Ebcioglu , Atakan Dogan , Reha Oguz Altug
发明人： Kemal Ebcioglu , Atakan Dogan , Reha Oguz Altug
IPC分类号： G06F9/455 , G06F9/50 , G06F15/78
CPC分类号： G06F9/45533 , G06F9/45558 , G06F9/5077 , G06F15/7871 , G06F2009/4557 , Y02D10/12 , Y02D10/13 , Y02D10/26 , Y02D10/28
摘要： A parallel hypervisor system for virtualizing application-specific supercomputers is disclosed. The hypervisor system comprises (a) at least one software-virtual hardware pair consisting of a software application, and an application-specific virtual supercomputer for accelerating the said software application, wherein (i) The virtual supercomputer contains one or more virtual tiles; and (ii) The software application and the virtual tiles communicate among themselves with messages; (b) One or more reconfigurable physical tiles, wherein each virtual tile of each supercomputer can be implemented on at least one physical tile, by configuring the physical tile to perform the virtual tile's function; and (c) A scheduler implemented substantially in hardware, for parallel pre-emptive scheduling of the virtual tiles on the physical tiles.

7. 发明授权

US10120704B2 Parallel hardware hypervisor for virtualizing application-specific supercomputers 有权
公开(公告)号：US10120704B2
公开(公告)日：2018-11-06
申请号：US15137268
申请日：2016-04-25
申请人： Kemal Ebcioglu , Atakan Dogan , Reha Oguz Altug
发明人： Kemal Ebcioglu , Atakan Dogan , Reha Oguz Altug
IPC分类号： G06F9/455 , G06F15/78 , G06F9/50
摘要： A parallel hypervisor system for virtualizing application-specific supercomputers is disclosed. The hypervisor system comprises (a) at least one software-virtual hardware pair consisting of a software application, and an application-specific virtual supercomputer for accelerating the said software application, wherein (i) The virtual supercomputer contains one or more virtual tiles; and (ii) The software application and the virtual tiles communicate among themselves with messages; (b) One or more reconfigurable physical tiles, wherein each virtual tile of each supercomputer can be implemented on at least one physical tile, by configuring the physical tile to perform the virtual tile's function; and (c) A scheduler implemented substantially in hardware, for parallel pre-emptive scheduling of the virtual tiles on the physical tiles.

8. 发明申请

US20170017476A1 Method and system for converting a single-threaded software program into an application-specific supercomputer 审中-公开
标题翻译：将单线程软件程序转换为专用超级计算机的方法和系统
公开(公告)号：US20170017476A1
公开(公告)日：2017-01-19
申请号：US15257319
申请日：2016-09-06
申请人： Kemal Ebcioglu , Emre Kultursay
发明人： Kemal Ebcioglu , Emre Kultursay
IPC分类号： G06F9/45 , G06F17/50 , G06F9/52
CPC分类号： G06F8/4452 , G06F8/40 , G06F8/452 , G06F9/52 , G06F15/17381 , G06F17/5045 , G06F17/5072 , G06F2217/68
摘要： The invention comprises (i) a compilation method for automatically converting a single-threaded software program into an application-specific supercomputer, and (ii) the supercomputer system structure generated as a result of applying this method. The compilation method comprises: (a) Converting an arbitrary code fragment from the application into customized hardware whose execution is functionally equivalent to the software execution of the code fragment; and (b) Generating interfaces on the hardware and software parts of the application, which (i) Perform a software-to-hardware program state transfer at the entries of the code fragment; (ii) Perform a hardware-to-software program state transfer at the exits of the code fragment; and (iii) Maintain memory coherence between the software and hardware memories. If the resulting hardware design is large, it is divided into partitions such that each partition can fit into a single chip. Then, a single union chip is created which can realize any of the partitions.
摘要翻译：本发明包括（i）用于将单线程软件程序自动转换为特定应用程序的超级计算机的编译方法，以及（ii）应用该方法生成的超级计算机系统结构。编译方法包括：（a）将来自应用的任意代码片段转换成其功能上等同于代码片段的软件执行的定制硬件; （b）在应用程序的硬件和软件部分生成接口，（i）在代码片段的条目处执行软件到硬件程序的状态转移; （ii）在代码片段的出口处执行硬件到软件程序状态传输; 和（iii）保持软件和硬件存储器之间的记忆一致性。如果最终的硬件设计较大，则将其划分为分区，以使每个分区可以适合单个芯片。然后，创建可以实现任何分区的单个联合芯片。

9. 发明申请

US20160246653A1 Parallel hardware hypervisor for virtualizing application-specific supercomputers 审中-公开
公开(公告)号：US20160246653A1
公开(公告)日：2016-08-25
申请号：US15137268
申请日：2016-04-25
申请人： Kemal Ebcioglu , Atakan Dogan , Reha Oguz Altug
发明人： Kemal Ebcioglu , Atakan Dogan , Reha Oguz Altug
IPC分类号： G06F9/50 , G06F9/455
CPC分类号： G06F9/45533 , G06F9/45558 , G06F9/5077 , G06F15/7871 , G06F2009/4557 , Y02D10/12 , Y02D10/13 , Y02D10/26 , Y02D10/28
摘要： A parallel hypervisor system for virtualizing application-specific supercomputers is disclosed. The hypervisor system comprises (a) at least one software-virtual hardware pair consisting of a software application, and an application-specific virtual supercomputer for accelerating the said software application, wherein (i) The virtual supercomputer contains one or more virtual tiles; and (ii) The software application and the virtual tiles communicate among themselves with messages; (b) One or more reconfigurable physical tiles, wherein each virtual tile of each supercomputer can be implemented on at least one physical tile, by configuring the physical tile to perform the virtual tile's function; and (c) A scheduler implemented substantially in hardware, for parallel pre-emptive scheduling of the virtual tiles on the physical tiles.

10. 发明申请

US20130205295A1 Parallel hardware hypervisor for virtualizing application-specific supercomputers 有权
标题翻译：用于虚拟化专用超级计算机的并行硬件管理程序
公开(公告)号：US20130205295A1
公开(公告)日：2013-08-08
申请号：US13366318
申请日：2012-02-04
申请人： Kemal Ebcioglu , Atakan Dogan , Reha Oguz Altug , Mikko Herman Lipasti , Eray Özkural
发明人： Kemal Ebcioglu , Atakan Dogan , Reha Oguz Altug , Mikko Herman Lipasti , Eray Özkural
IPC分类号： G06F9/455
CPC分类号： G06F9/45533 , G06F9/45558 , G06F9/5077 , G06F15/7871 , G06F2009/4557 , Y02D10/12 , Y02D10/13 , Y02D10/26 , Y02D10/28
摘要： A parallel hypervisor system for virtualizing application-specific supercomputers is disclosed. The hypervisor system comprises (a) at least one software-virtual hardware pair consisting of a software application, and an application-specific virtual supercomputer for accelerating the said software application, wherein (i) The virtual supercomputer contains one or more virtual tiles; and (ii) The software application and the virtual tiles communicate among themselves with messages; (b) One or more reconfigurable physical tiles, wherein each virtual tile of each supercomputer can be implemented on at least one physical tile, by configuring the physical tile to perform the virtual tile's function; and (c) A scheduler implemented substantially in hardware, for parallel pre-emptive scheduling of the virtual tiles on the physical tiles.
摘要翻译：公开了一种虚拟化专用超级计算机的并行管理程序系统。虚拟机管理程序系统包括：（a）由软件应用程序和用于加速所述软件应用程序的特定于应用程序的虚拟超级计算机组成的至少一个软件 - 虚拟硬件对，其中，（i）虚拟超级计算机包含一个或多个虚拟瓦片; 和（ii）软件应用程序和虚拟瓦片与消息之间进行通信; （b）一个或多个可重新配置的物理瓦片，其中每个超级计算机的每个虚拟瓦片可以通过配置所述物理瓦片来执行所述虚拟瓦片的功能而在至少一个物理瓦片上实现; 和（c）基本上以硬件实现的调度器，用于对物理瓦片上的虚拟瓦片进行并行预先调度。

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