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    • 1. 发明授权
    • Semiconductor device and fabrication method
    • 半导体器件及其制造方法
    • US08421161B2
    • 2013-04-16
    • US12656320
    • 2010-01-26
    • Kazushige Iwamoto
    • Kazushige Iwamoto
    • H01L27/088
    • H01L21/823493H01L21/823418H01L21/823462H01L29/66659
    • A semiconductor device has a semiconductor substrate in which first and second wells are formed. The substrate and wells are of the same conductivity type, but the second well has a higher impurity concentration than the first well. High-voltage MOS transistors are formed in the first well, and a low-voltage MOS transistor is formed in the second well. The high-voltage MOS transistors include a first transistor having a gate oxide layer with a first thickness and a second transistor having a gate oxide layer with a second thickness less than the first thickness. The low-voltage MOS transistor has a third gate oxide layer with a third thickness less than the first thickness. The second high-voltage MOS transistor provides efficient current conduction.
    • 半导体器件具有其中形成第一和第二阱的半导体衬底。 衬底和阱具有相同的导电类型,但是第二阱具有比第一阱更高的杂质浓度。 在第一阱中形成高压MOS晶体管,在第二阱中形成低压MOS晶体管。 高压MOS晶体管包括具有第一厚度的栅极氧化物层的第一晶体管和具有小于第一厚度的第二厚度的栅极氧化物层的第二晶体管。 低压MOS晶体管具有第三厚度小于第一厚度的第三栅极氧化层。 第二高压MOS晶体管提供有效的电流传导。
    • 6. 发明申请
    • Semiconductor device and fabrication method
    • 半导体器件及其制造方法
    • US20100187639A1
    • 2010-07-29
    • US12656320
    • 2010-01-26
    • Kazushige Iwamoto
    • Kazushige Iwamoto
    • H01L27/088H01L21/8234
    • H01L21/823493H01L21/823418H01L21/823462H01L29/66659
    • A semiconductor device has a semiconductor substrate in which first and second wells are formed. The substrate and wells are of the same conductivity type, but the second well has a higher impurity concentration than the first well. High-voltage MOS transistors are formed in the first well, and a low-voltage MOS transistor is formed in the second well. The high-voltage MOS transistors include a first transistor having a gate oxide layer with a first thickness and a second transistor having a gate oxide layer with a second thickness less than the first thickness. The low-voltage MOS transistor has a third gate oxide layer with a third thickness less than the first thickness. The second high-voltage MOS transistor provides efficient current conduction.
    • 半导体器件具有其中形成第一和第二阱的半导体衬底。 衬底和阱具有相同的导电类型,但是第二阱具有比第一阱更高的杂质浓度。 在第一阱中形成高压MOS晶体管,在第二阱中形成低压MOS晶体管。 高压MOS晶体管包括具有第一厚度的栅极氧化物层的第一晶体管和具有小于第一厚度的第二厚度的栅极氧化物层的第二晶体管。 低压MOS晶体管具有第三厚度小于第一厚度的第三栅极氧化层。 第二高压MOS晶体管提供有效的电流传导。