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1. 发明申请

US20130075815A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20130075815A1
公开(公告)日：2013-03-28
申请号：US13424150
申请日：2012-03-19
申请人： Kazuaki YAMAURA
发明人： Kazuaki YAMAURA
IPC分类号： H01L29/78
CPC分类号： H01L29/7825 , H01L21/823418 , H01L27/088 , H01L29/0653 , H01L29/0878 , H01L29/42368
摘要： According to one embodiment, a semiconductor device includes a semiconductor substrate and a first semiconductor element provided on the semiconductor substrate. The first semiconductor element includes: a first semiconductor; a second semiconductor layer; a third semiconductor layer; a first insulating layer; a first base region; a first source region; a first gate electrode; a first drift layer; a first drain region; a first source; and a first drain electrode. A concentration of an impurity element of the first conductivity type included in the first drift layer is lower than a concentration of an impurity element of the first conductivity type included in the first semiconductor layer. The concentration of the impurity element of the first conductivity type included in the first drift layer is higher than a concentration of an impurity element of the first conductivity type included in the second semiconductor layer.
摘要翻译：根据一个实施例，半导体器件包括半导体衬底和设置在半导体衬底上的第一半导体元件。第一半导体元件包括：第一半导体; 第二半导体层; 第三半导体层; 第一绝缘层; 第一基区; 第一源区; 第一栅电极; 第一漂移层; 第一漏区; 第一来源和第一漏电极。包含在第一漂移层中的第一导电类型的杂质元素的浓度低于包含在第一半导体层中的第一导电类型的杂质元素的浓度。包括在第一漂移层中的第一导电类型的杂质元素的浓度高于包括在第二半导体层中的第一导电类型的杂质元素的浓度。

2. 发明申请

US20100163973A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100163973A1
公开(公告)日：2010-07-01
申请号：US12644734
申请日：2009-12-22
申请人： Yuki Nakamura , Koji Shirai , Hirofumi Nagano , Jun Morioka , Tsubasa Yamada , Kazuaki Yamaura , Yasunori Iwatsu
发明人： Yuki Nakamura , Koji Shirai , Hirofumi Nagano , Jun Morioka , Tsubasa Yamada , Kazuaki Yamaura , Yasunori Iwatsu
IPC分类号： H01L27/06 , H01L21/8234
CPC分类号： H01L27/0635 , H01L27/0629
摘要： A semiconductor device includes a P-type substrate 1, an N-type buried layer 2, a P-type buried layer 3, N-type epitaxial layers 4, P-type diffusion layers 6, P-type diffusion layers 8, P-type diffusion layers 11, first electrodes formed on the P-type diffusion layers 11, N-type diffusion layers 9, P-type diffusion layers 12, N-type diffusion layers 13, second electrodes formed on the P-type diffusion layers 12 and the N-type diffusion layers 13, and gate electrodes 10 short-circuited with the second electrodes. The N-type buried layer 2 is in a floating state.
摘要翻译：半导体器件包括P型衬底1，N型掩埋层2，P型掩埋层3，N型外延层4，P型扩散层6，P型扩散层8，P- 型扩散层11，形成在P型扩散层11上的第一电极，N型扩散层9，P型扩散层12，N型扩散层13，形成在P型扩散层12上的第二电极和 N型扩散层13和与第二电极短路的栅电极10。 N型埋层2处于浮置状态。

3. 发明授权

US08637952B2 Semiconductor device with zener diode and method for manufacturing same 失效
标题翻译：具有齐纳二极管的半导体器件及其制造方法
公开(公告)号：US08637952B2
公开(公告)日：2014-01-28
申请号：US13045504
申请日：2011-03-10
申请人： Kazuaki Yamaura
发明人： Kazuaki Yamaura
IPC分类号： H01L29/66
CPC分类号： H01L29/866 , H01L29/66106
摘要： According to one embodiment, a semiconductor device includes a semiconductor substrate, a first conductivity type region, a device isolation insulating film, a second conductivity type region, and a low concentration region. The first conductivity type region is formed in part of the semiconductor substrate. The device isolation insulating film is formed in an upper surface of the semiconductor substrate and includes an opening formed in part of an immediately overlying region of the first conductivity type region. The second conductivity type region is formed in the opening and is in contact with the first conductivity type region. The low concentration region is formed along a side surface of the opening, has second conductivity type, has an effective impurity concentration lower than an effective impurity concentration of the second conductivity type region, and separates an interface of the first conductivity type region and the second conductivity type region from the device isolation insulating film.
摘要翻译：根据一个实施例，半导体器件包括半导体衬底，第一导电类型区域，器件隔离绝缘膜，第二导电类型区域和低浓度区域。第一导电类型区域形成在半导体衬底的一部分中。器件隔离绝缘膜形成在半导体衬底的上表面中，并且包括形成在第一导电类型区域的紧邻区域的一部分中的开口。第二导电类型区域形成在开口中并且与第一导电类型区域接触。所述低浓度区域沿着所述开口的侧面形成，具有第二导电型，具有比所述第二导电类型区域的有效杂质浓度低的有效杂质浓度，并且分离所述第一导电类型区域和所述第二导电类型区域的界面导电类型区域从器件隔离绝缘膜。

4. 发明授权

US08502306B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08502306B2
公开(公告)日：2013-08-06
申请号：US13424150
申请日：2012-03-19
申请人： Kazuaki Yamaura
发明人： Kazuaki Yamaura
IPC分类号： H01L29/76 , H01L31/113
CPC分类号： H01L29/7825 , H01L21/823418 , H01L27/088 , H01L29/0653 , H01L29/0878 , H01L29/42368
摘要： According to one embodiment, a semiconductor device includes a semiconductor substrate and a first semiconductor element provided on the semiconductor substrate. The first semiconductor element includes: a first semiconductor; a second semiconductor layer; a third semiconductor layer; a first insulating layer; a first base region; a first source region; a first gate electrode; a first drift layer; a first drain region; a first source; and a first drain electrode. A concentration of an impurity element of the first conductivity type included in the first drift layer is lower than a concentration of an impurity element of the first conductivity type included in the first semiconductor layer. The concentration of the impurity element of the first conductivity type included in the first drift layer is higher than a concentration of an impurity element of the first conductivity type included in the second semiconductor layer.
摘要翻译：根据一个实施例，半导体器件包括半导体衬底和设置在半导体衬底上的第一半导体元件。第一半导体元件包括：第一半导体; 第二半导体层; 第三半导体层; 第一绝缘层; 第一基区; 第一源区; 第一栅电极; 第一漂移层; 第一漏区; 第一来源和第一漏电极。包含在第一漂移层中的第一导电类型的杂质元素的浓度低于包含在第一半导体层中的第一导电类型的杂质元素的浓度。包括在第一漂移层中的第一导电类型的杂质元素的浓度高于包括在第二半导体层中的第一导电类型的杂质元素的浓度。

5. 发明授权

US08304827B2 Semiconductor device having on a substrate a diode formed by making use of a DMOS structure 有权
标题翻译：在衬底上具有通过利用DMOS结构形成的二极管的半导体器件
公开(公告)号：US08304827B2
公开(公告)日：2012-11-06
申请号：US12644734
申请日：2009-12-22
申请人： Yuki Nakamura , Koji Shirai , Hirofumi Nagano , Jun Morioka , Tsubasa Yamada , Kazuaki Yamaura , Yasunori Iwatsu
发明人： Yuki Nakamura , Koji Shirai , Hirofumi Nagano , Jun Morioka , Tsubasa Yamada , Kazuaki Yamaura , Yasunori Iwatsu
IPC分类号： H01L29/66
CPC分类号： H01L27/0635 , H01L27/0629
摘要： A semiconductor device includes a diode formed by making use of a DMOS transistor structure. In addition to such a DMOS transistor structure, the semiconductor device includes a second buried layer of the first conductivity type being provided on a first buried layer of a second conductivity type that is in a floating state. Moreover, the second buried layer of the first conductivity type and a second diffusion region of the first conductive type are connected by a first diffusion region of the first conductivity type. A first electrode is set as anode, and a second electrode and a third electrode are short-circuited and set as cathode.
摘要翻译：半导体器件包括通过利用DMOS晶体管结构形成的二极管。除了这种DMOS晶体管结构之外，半导体器件包括第一导电类型的第二掩埋层，其设置在处于浮置状态的第二导电类型的第一掩埋层上。此外，第一导电类型的第二掩埋层和第一导电类型的第二扩散区域通过第一导电类型的第一扩散区域连接。第一电极被设置为阳极，第二电极和第三电极被短路并设置为阴极。

6. 发明申请

US20110266650A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110266650A1
公开(公告)日：2011-11-03
申请号：US13045504
申请日：2011-03-10
申请人： Kazuaki YAMAURA
发明人： Kazuaki YAMAURA
IPC分类号： H01L29/06 , H01L21/328
CPC分类号： H01L29/866 , H01L29/66106
摘要： According to one embodiment, a semiconductor device includes a semiconductor substrate, a first conductivity type region, a device isolation insulating film, a second conductivity type region, and a low concentration region. The first conductivity type region is formed in part of the semiconductor substrate. The device isolation insulating film is formed in an upper surface of the semiconductor substrate and includes an opening formed in part of an immediately overlying region of the first conductivity type region. The second conductivity type region is formed in the opening and is in contact with the first conductivity type region. The low concentration region is formed along a side surface of the opening, has second conductivity type, has an effective impurity concentration lower than an effective impurity concentration of the second conductivity type region, and separates an interface of the first conductivity type region and the second conductivity type region from the device isolation insulating film.
摘要翻译：根据一个实施例，半导体器件包括半导体衬底，第一导电类型区域，器件隔离绝缘膜，第二导电类型区域和低浓度区域。第一导电类型区域形成在半导体衬底的一部分中。器件隔离绝缘膜形成在半导体衬底的上表面中，并且包括形成在第一导电类型区域的紧邻区域的一部分中的开口。第二导电类型区域形成在开口中并且与第一导电类型区域接触。所述低浓度区域沿着所述开口的侧面形成，具有第二导电型，具有比所述第二导电类型区域的有效杂质浓度低的有效杂质浓度，并且分离所述第一导电类型区域和所述第二导电类型区域的界面导电类型区域从器件隔离绝缘膜。

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