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    • 1. 发明申请
    • OPTICAL INFORMATION RECORDING MEDIUM
    • 光信息记录介质
    • US20100182896A1
    • 2010-07-22
    • US12686604
    • 2010-01-13
    • Hiroshi UchiyamaYusuke SuzukiTakao KudoKatsumi Miura
    • Hiroshi UchiyamaYusuke SuzukiTakao KudoKatsumi Miura
    • G11B7/26
    • G11B7/245G11B7/24038Y10T428/21
    • An optical information recording medium includes a recording layer that includes a mark layer in which recording marks formed in accordance with condensed recording light are aligned and has a recording light absorption amount of 20.8% or less with respect to an innermost depth as a depth of the mark layer from a side thereof that the recording light enters to a side thereof that is most distant from the side that the recording light enters, and a change amount of a light absorption amount with respect to measurement light having a wavelength 10 nm shorter than that of the recording light at a time a light absorption amount with respect to measurement light having the same wavelength as the recording light is used as a reference, of 8.0% or more per 0.30 mm.
    • 光信息记录介质包括记录层,记录层包括标记层,其中根据浓缩记录光形成的记录标记对准,并且具有相对于最深深度为20.8%或更小的记录光吸收量,作为深度 标记层从记录光进入其最远离记录光进入的一侧的一侧,以及相对于波长为10nm的测量光的光吸收量的变化量相对于波长比其短10nm的测量光的变化量。 在相对于与记录光的波长相同的测量光的光吸收量作为参考的情况下,记录光的值为每0.30mm为8.0%以上。
    • 4. 发明授权
    • Microcomputer equipped with DMA controller allowed to continue to
perform data transfer operations even after completion of a current
data transfer operation
    • 配备有DMA控制器的微型计算机即使在当前的数据传输操作完成之后也能够继续执行数据传输操作
    • US5696989A
    • 1997-12-09
    • US720288
    • 1991-06-25
    • Katsumi MiuraYuko Mitsuhira
    • Katsumi MiuraYuko Mitsuhira
    • G06F13/28G06F13/12
    • G06F13/28
    • A microprocessor with a DMA controller for performing data transfers between a peripheral unit and a memory in response to a transfer request from the peripheral unit. The DMA controller includes a first memory block for storing information necessary to perform a current DMA data transfer and a second memory block for storing information necessary to perform the next DMA data transfer. The second DMA data transfer is initiated after completion of the first data transfer and the information stored in the second memory block is transferred to the first memory block. This process is repeated for all subsequent DMA data transfers. Each section of information stored in the first and second memory blocks includes the number of data transfers to be performed, a memory access address representing the location of the data to be transferred, and control/status information. The control/status information includes enable/disable information indicated whether another block of data is to be transferred via the DMA data transfer, thereby shortening the duration of a data transfer inhibiting state.
    • 一种具有DMA控制器的微处理器,用于响应于来自外围单元的传送请求在外围单元和存储器之间执行数据传输。 DMA控制器包括用于存储执行当前DMA数据传输所必需的信息的第一存储器块和用于存储执行下一个DMA数据传输所必需的信息的第二存储器块。 第二DMA数据传输在完成第一数据传输之后启动,并且存储在第二存储器块中的信息被传送到第一存储器块。 对所有后续DMA数据传输重复此过程。 存储在第一和第二存储器块中的每个部分信息包括要执行的数据传送的数量,表示要传送的数据的位置的存储器访问地址以及控制/状态信息。 控制/状态信息包括指示是否要通过DMA数据传送传送另一数据块的启用/禁用信息,从而缩短数据传送禁止状态的持续时间。