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    • 3. 发明申请
    • VARIABLE GAIN AMPLIFIER
    • 可变增益放大器
    • US20120007680A1
    • 2012-01-12
    • US13240656
    • 2011-09-22
    • Katsumasa HIJIKATAMineyuki Iwaida
    • Katsumasa HIJIKATAMineyuki Iwaida
    • H03G3/20H03F1/22
    • H03G1/0088H03F1/0261H03F1/0277H03F1/223H03F1/3205H03F3/211H03F2200/18H03F2200/27H03F2200/451H03F2200/555
    • A variable gain amplifier includes a direct current (DC) blocking capacitor which receives an input signal at a first terminal, a variable amplifier unit, having a variable transistor size, which amplifies an output of a second terminal of the DC blocking capacitor, a load impedance unit coupled to an output of the variable amplifier unit, a bias resistor having a first terminal coupled to the second terminal of the DC blocking capacitor, a variable bias voltage generator which applies a variable bias voltage to a second terminal of the bias resistor, and a gain controller which provides control to decrease the variable bias voltage when an effective transistor size of the variable amplifier unit is controlled so as to increase, and provides control to increase the variable bias voltage when the effective transistor size of the variable amplifier unit control is controlled so as to decrease.
    • 可变增益放大器包括:接收第一端子处的输入信号的直流(DC)阻塞电容器,具有可变晶体管尺寸的可变放大器单元,其放大隔直流电容器的第二端子的输出;负载 耦合到可变放大器单元的输出的阻抗单元,具有耦合到隔直流电容器的第二端子的第一端子的偏置电阻器,向偏置电阻器的第二端子施加可变偏置电压的可变偏置电压发生器, 以及增益控制器,当控制可变放大器单元的有效晶体管尺寸以增加时,提供控制以减小可变偏置电压,并且当可变放大器单元的有效晶体管尺寸控制时提供控制以增加可变偏置电压 被控制以减少。
    • 4. 发明申请
    • INTEGRATED CIRCUIT FOR PROCESSING MULTI-CHANNEL RADIO SIGNAL
    • 用于处理多通道无线电信号的集成电路
    • US20090154615A1
    • 2009-06-18
    • US12299846
    • 2007-11-20
    • Katsumasa HijikataJoji Hayashi
    • Katsumasa HijikataJoji Hayashi
    • H04L27/06
    • H04B15/02H04B1/28H04B2215/064H04B2215/065H04N5/4401H04N21/42638H04N21/4382
    • A multi-channel radio signal processing integrated circuit (10A) includes: an analog signal processing unit (101) for generating a local signal based on an externally supplied reference clock signal and selecting a desired channel from the multi-channel radio signal using the local signal; a digital signal processing unit (102) for performing digital demodulation of a signal of the channel selected by the analog signal processing unit (101); an operation clock generating unit (103) for generating an operation clock signal for the digital signal processing unit (102); and a control unit (104) for designating a frequency of the operation clock signal to be generated by the operation clock generating unit (103) in response the channel selected by the analog signal processing unit (101).
    • 多通道无线电信号处理集成电路(10A)包括:模拟信号处理单元(101),用于基于外部提供的参考时钟信号产生本地信号,并且使用本地的多频道无线电信号从多频道无线电信号中选择期望的频道 信号; 数字信号处理单元(102),用于对由模拟信号处理单元(101)选择的信道的信号执行数字解调; 操作时钟生成单元,用于产生用于数字信号处理单元(102)的操作时钟信号; 以及控制单元(104),用于响应由模拟信号处理单元(101)选择的频道来指定由操作时钟产生单元(103)产生的操作时钟信号的频率。
    • 5. 发明申请
    • Mixer circuit
    • 搅拌机电路
    • US20070111695A1
    • 2007-05-17
    • US10581038
    • 2004-11-15
    • Katsumasa HijikataJoji Hayashi
    • Katsumasa HijikataJoji Hayashi
    • H04B1/18H04B1/26
    • H03D7/1441H03D7/1433H03D7/1458H03D2200/0043H03D2200/0084
    • A mixer circuit of a receiving system, requiring low noise characteristics at lower frequency, includes a bypass current source (41) which is connected in parallel with an LO transistor (21) between an IF output terminal (33) and a drain terminal of an RF transistor (11), and a bypass current source (42) which is connected in parallel with an LO transistor (22) between an IF output terminal (34) and the drain terminal of the RF transistor (11), thereby decreasing a current flowing through the LO transistors (21, 22) without decreasing a bias current flowing through the RF transistor (11). Accordingly, it is possible to suppress flicker noises occurring from the LO transistors (21, 22) without lowering the gain of the mixer, thereby realizing a mixer circuit with excellent low frequency noise characteristics, which can improve the NF characteristics at lower frequency.
    • 在较低频率下要求低噪声特性的接收系统的混频器电路包括旁路电流源(41),其与IF晶体管(21)并联连接在IF输出端子(33)和漏极端子 射频晶体管(11)和旁路电流源(42),其与IF晶体管(22)并联连接在IF输出端子(34)和RF晶体管(11)的漏极端子之间,从而减小电流 流过所述LO晶体管(21,22)而不减少流过所述RF晶体管(11)的偏置电流。 因此,可以在不降低混频器的增益的情况下抑制从LO晶体管(21,22)发生的闪烁噪声,从而实现具有优异的低频噪声特性的混频器电路,这可以提高低频下的NF特性。
    • 9. 发明授权
    • Variable gain amplifier
    • 可变增益放大器
    • US08253492B2
    • 2012-08-28
    • US13240656
    • 2011-09-22
    • Katsumasa HijikataMineyuki Iwaida
    • Katsumasa HijikataMineyuki Iwaida
    • H03G3/10
    • H03G1/0088H03F1/0261H03F1/0277H03F1/223H03F1/3205H03F3/211H03F2200/18H03F2200/27H03F2200/451H03F2200/555
    • A variable gain amplifier includes a direct current (DC) blocking capacitor which receives an input signal at a first terminal, a variable amplifier unit, having a variable transistor size, which amplifies an output of a second terminal of the DC blocking capacitor, a load impedance unit coupled to an output of the variable amplifier unit, a bias resistor having a first terminal coupled to the second terminal of the DC blocking capacitor, a variable bias voltage generator which applies a variable bias voltage to a second terminal of the bias resistor, and a gain controller which provides control to decrease the variable bias voltage when an effective transistor size of the variable amplifier unit is controlled so as to increase, and provides control to increase the variable bias voltage when the effective transistor size of the variable amplifier unit control is controlled so as to decrease.
    • 可变增益放大器包括:接收第一端子处的输入信号的直流(DC)阻塞电容器,具有可变晶体管尺寸的可变放大器单元,其放大隔直流电容器的第二端子的输出;负载 耦合到可变放大器单元的输出的阻抗单元,具有耦合到隔直流电容器的第二端子的第一端子的偏置电阻器,向偏置电阻器的第二端子施加可变偏置电压的可变偏置电压发生器, 以及增益控制器,当控制可变放大器单元的有效晶体管尺寸以增加时,提供控制以减小可变偏置电压,并且当可变放大器单元的有效晶体管尺寸控制时提供控制以增加可变偏置电压 被控制以减少。