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1. 发明专利

IL268224D0 Pharmaceutical composition for preventing and treating pancreatic cancer, containing gossypol and phenformin as active ingredients 未知
公开(公告)号：IL268224D0
公开(公告)日：2019-09-26
申请号：IL26822419
申请日：2019-07-23
申请人： NAT CANCER CT , SOO YOUL KIM , SANG MYUNG WOO , WOO JIN LEE , TAE HYUN KIM , SANG JAE PARK , JU HEE LEE , SUNG SIK HAN , EUN KYUNG HONG
发明人： SOO YOUL KIM , SANG MYUNG WOO , WOO JIN LEE , TAE HYUN KIM , SANG JAE PARK , JU HEE LEE , SUNG SIK HAN , EUN KYUNG HONG
IPC分类号： A61K20060101
摘要： The present invention provides a pharmaceutical composition containing gossypol and phenformin, capable of exhibiting a synergistic effect in the treatment of pancreatic cancer. When gossypol and phenformin are mixed in a concentration range provided in the present invention and the mixture is applied to the treatment of pancreatic cancer, apoptotic effects on pancreatic cancer are remarkably increased because of the co-administration thereof even in a concentration range in which a significant pancreatic cancer treatment effect cannot be achieved by the administration of gossypol or phenformin alone, such that pancreatic cancer can be effectively treated. Additionally, when an anti-cancer agent is mixed in addition to gossypol and phenformin and the mixture is applied to the treatment of pancreatic cancer, apoptotic effects on cancer cells can be remarkably increased such that pancreatic cancer can be effectively treated.

2. 发明授权

US08355090B2 Liquid crystal display having reduced kickback effect 有权
标题翻译：具有降低回扣效果的液晶显示器
公开(公告)号：US08355090B2
公开(公告)日：2013-01-15
申请号：US12507764
申请日：2009-07-22
申请人： Ji-Hyun Kwon , Hye-Seok Na , Won-Hee Lee , Ho-Kyoon Kwon , Byoung-Sun Na , Dong-Yoon Lee , Ju-Hee Lee , Gwang-Bum Ko
发明人： Ji-Hyun Kwon , Hye-Seok Na , Won-Hee Lee , Ho-Kyoon Kwon , Byoung-Sun Na , Dong-Yoon Lee , Ju-Hee Lee , Gwang-Bum Ko
IPC分类号： G02F1/1343 , G02F1/136
CPC分类号： G02F1/136286 , G02F1/134363 , G02F2001/134345 , G09G2300/0426 , G09G2300/0439 , G09G2320/0209
摘要： A liquid crystal display (LCD), according to an exemplary embodiment of the present invention, includes a first pixel formed between the first and second gate lines, the first and the second data lines, a first subpixel configured to have applied thereto a first data voltage and a second subpixel configured to have applied thereto a second data voltage lower than the first data voltage, a second pixel formed between the second and third gate lines, the first and second data lines, and having a third subpixel configured to have applied thereto a third data voltage and a fourth subpixel configured to have applied thereto a fourth data voltage lower than the third data voltage. The first subpixel and the third subpixel are connected to a first thin film transistor and a third thin film transistor respectively, the first thin film transistor and the third thin film transistor have source electrodes connected to the first data line and the second data line respectively, and each of the source electrodes has an open portion surrounding a portion of a drain electrode, and wherein an open direction of the source electrode of the first thin film transistor is opposite to an open direction of the source electrode of the third thin film transistor.
摘要翻译：根据本发明的示例性实施例的液晶显示器（LCD）包括形成在第一和第二栅极线之间的第一像素，第一和第二数据线，第一子像素，其被配置为向其施加第一数据电压和第二子像素，其被配置为向其施加低于第一数据电压的第二数据电压;第二像素，形成在第二和第三栅极线之间，第一和第二数据线，并且具有被配置为施加到其的第三子像素第三数据电压和第四子像素，被配置为向其施加低于第三数据电压的第四数据电压。第一子像素和第三子像素分别连接到第一薄膜晶体管和第三薄膜晶体管，第一薄膜晶体管和第三薄膜晶体管分别具有连接到第一数据线和第二数据线的源电极，并且每个源极电极具有围绕漏电极的一部分的开口部分，并且其中第一薄膜晶体管的源极电极的开放方向与第三薄膜晶体管的源电极的开路方向相反。

3. 发明授权

US08070572B2 Fishing simulation method, fishing simulation execution method, and fishing simulator 有权
标题翻译：钓鱼模拟方法，钓鱼模拟执行方法和钓鱼模拟器
公开(公告)号：US08070572B2
公开(公告)日：2011-12-06
申请号：US12391972
申请日：2009-02-24
申请人： Chun Woo Lee , Ju Hee Lee , Gun Ho Lee
发明人： Chun Woo Lee , Ju Hee Lee , Gun Ho Lee
IPC分类号： A63F9/24
CPC分类号： G09B9/00 , G09B9/06 , G09B19/003
摘要： The present invention relates to a fishing simulation method, a fishing simulation execution method, and a fishing simulator, and more specifically, to a fishing simulation method, a fishing simulation execution method, and a fishing simulator, in which a fishing activity procedure of detecting a fish school, gathering fish, and catching the fish can be realized in a three-dimensional virtual space of a computer, and a fishery environment and fishing activity simulated in the computer virtual space comes to be similar to a real fishery environment and fishing activity by simulating the behavior of the fish school, including an avoidance behavior of fish entities forming the fish school, responding to the movement of a fishing boat and a fishing gear, thereby enhancing learning effects on the fishery environment and the fishing activity.
摘要翻译：钓鱼模拟方法，钓鱼模拟执行方法和钓鱼模拟器技术领域本发明涉及钓鱼模拟方法，钓鱼模拟执行方法和钓鱼模拟器，更具体地，涉及钓鱼模拟方法，钓鱼模拟执行方法和钓鱼模拟器，在计算机的三维虚拟空间中可以实现鱼类学校，鱼类捕捞和捕鱼，计算机虚拟空间模拟的渔业环境和捕鱼活动与真正的渔业环境和捕鱼活动相似通过模拟鱼类学校的行为，包括组成鱼类学校的鱼类实体的回避行为，回应渔船和渔具的移动，从而增强对渔业环境和捕鱼活动的学习效果。

4. 发明申请

US20090220922A1 FISHING SIMULATION METHOD, FISHING SIMULATION EXECUTION METHOD, AND FISHING SIMULATOR 有权
标题翻译：捕鱼模拟方法，捕捞模拟执行方法和捕鱼模拟器
公开(公告)号：US20090220922A1
公开(公告)日：2009-09-03
申请号：US12391972
申请日：2009-02-24
申请人： Chun Woo Lee , Ju Hee Lee , Gun Ho Lee
发明人： Chun Woo Lee , Ju Hee Lee , Gun Ho Lee
IPC分类号： G09B9/06 , G09B9/56
CPC分类号： G09B9/00 , G09B9/06 , G09B19/003
摘要： The present invention relates to a fishing simulation method, a fishing simulation execution method, and a fishing simulator, and more specifically, to a fishing simulation method, a fishing simulation execution method, and a fishing simulator, in which a fishing activity procedure of detecting a fish school, gathering fish, and catching the fish can be realized in a three-dimensional virtual space of a computer, and a fishery environment and fishing activity simulated in the computer virtual space comes to be similar to a real fishery environment and fishing activity by simulating the behavior of the fish school, including an avoidance behavior of fish entities forming the fish school, responding to the movement of a fishing boat and a fishing gear, thereby enhancing learning effects on the fishery environment and the fishing activity.
摘要翻译：钓鱼模拟方法，钓鱼模拟执行方法和钓鱼模拟器技术领域本发明涉及钓鱼模拟方法，钓鱼模拟执行方法和钓鱼模拟器，更具体地，涉及钓鱼模拟方法，钓鱼模拟执行方法和钓鱼模拟器，在计算机的三维虚拟空间中可以实现鱼类学校，鱼类捕捞和捕鱼，计算机虚拟空间模拟的渔业环境和渔业活动与真正的渔业环境和捕鱼活动相似通过模拟鱼类学校的行为，包括组成鱼类学校的鱼类实体的回避行为，回应渔船和渔具的移动，从而增强对渔业环境和捕鱼活动的学习效果。

5. 发明授权

US07384823B2 Method for manufacturing a semiconductor device having a stabilized contact resistance 失效
标题翻译：具有稳定的接触电阻的半导体器件的制造方法
公开(公告)号：US07384823B2
公开(公告)日：2008-06-10
申请号：US11120573
申请日：2005-05-02
申请人： Hyun Ahn , Ju Hee Lee
发明人： Hyun Ahn , Ju Hee Lee
IPC分类号： H01L21/82 , H01L21/3205
CPC分类号： H01L21/76895 , H01L21/76877
摘要： Disclosed is a method for forming a storage node contact of a semiconductor device. In such a method, there is provided a substrate formed with gates and source/drain regions. A landing plug poly is formed between the gates, and an insulating interlayer is formed over the entire surface of the substrate including the landing plug poly and the gates. The insulating interlayer is then etched to form a storage node contact hole exposing the landing plug poly. Thereafter, the landing plug poly exposed through the storage node contact hole is removed. Finally, a polysilicon film is filled up within a vacant portion from which the landing plug poly is removed and the storage node contact hole above the vacant portion.
摘要翻译：公开了一种用于形成半导体器件的存储节点接触的方法。在这种方法中，提供了形成有栅极和源极/漏极区域的衬底。在栅极之间形成着色插塞多晶硅，并且在包括着陆插塞多晶硅和栅极的基板的整个表面上形成绝缘中间层。然后对绝缘中间层进行蚀刻以形成暴露着陆塞多晶硅的存储节点接触孔。此后，去除了通过存储节点接触孔暴露的着陆栓多孔。最后，将多晶硅膜填充在空出部分内，其中去除着陆栓多晶硅并且在空部分上方存储节点接触孔。

6. 发明授权

US08456409B2 Gate drive circuit and display apparatus having the same 有权
标题翻译：栅极驱动电路和具有该栅极驱动电路的显示装置
公开(公告)号：US08456409B2
公开(公告)日：2013-06-04
申请号：US12533821
申请日：2009-07-31
申请人： Gwang-Bum Ko , Won-Hee Lee , Ho-Kyoon Kwon , Byoung-Sun Na , Ju-Hee Lee , Ji-Hyun Kwon
发明人： Gwang-Bum Ko , Won-Hee Lee , Ho-Kyoon Kwon , Byoung-Sun Na , Ju-Hee Lee , Ji-Hyun Kwon
IPC分类号： G09G3/36
CPC分类号： G09G3/3677 , G09G2300/0408 , G09G2300/0417 , G09G2300/0426 , G09G2310/0224 , G09G2310/0286 , G09G2310/08 , G09G2320/0223 , G09G2320/0247 , G09G2330/06
摘要： Gate drive circuit includes a plurality of stages connected one after another to each other. An m-th stage includes a pull-up section outputting a first clock signal as a gate signal of the m-th stage to an output terminal, a pull-down section applying a low voltage to the output terminal, a carry section outputting the first clock signal as a carry signal of the m-th stage in response to the high voltage of the first node signal, a first carry holding section maintaining the carry signal of the m-th stage at the low voltage in response to the high voltage of the first clock signal and a second carry holding section maintaining the carry signal of the m-th stage at the low voltage in response to a high voltage of the second clock signal.
摘要翻译：栅极驱动电路包括彼此相继连接的多个级。第m级包括将作为第m级的门信号的第一时钟信号输出到输出端的上拉部分，向输出端子施加低电压的下拉部分，输出第一时钟信号作为响应于第一节点信号的高电压的第m级的进位信号，第一进位保持部分响应于高电压而将第m级的进位信号保持在低电压以及第二进位保持部，其响应于所述第二时钟信号的高电压而将所述第m级的进位信号保持在所述低电压。

7. 发明申请

US20100258820A1 MANUFACTURING METHOD FOR CONTACT PADS OF A THIN FILM TRANSISTOR ARRAY PANEL, AND A THIN FILM TRANSISTOR ARRAY PANEL HAVING SUCH CONTACT PADS 有权
标题翻译：薄膜晶体管阵列接触片的制造方法和具有这种接触垫的薄膜晶体管阵列面板
公开(公告)号：US20100258820A1
公开(公告)日：2010-10-14
申请号：US12512623
申请日：2009-07-30
申请人： Dong-Gyu KIM , Yeong-Keun Kwon , Ju-Hee Lee
发明人： Dong-Gyu KIM , Yeong-Keun Kwon , Ju-Hee Lee
IPC分类号： H01L27/12 , G03F1/00 , H01L21/336 , H01L33/00
CPC分类号： H01L27/1248 , G03F1/00 , G03F1/36 , G03F1/50 , H01L27/12 , H01L27/124
摘要： A thin film transistor array panel includes a first insulation substrate, a plurality of data wires formed on the first insulation substrate and extending in a first direction, a data pad region formed on the first insulation substrate and having plural ones of the data wires extending therefrom, and an organic layer formed on the data wires, where the organic layer has a greater thickness where it is disposed over the data wires than the thickness it has between the data wires. The surface of the organic layer of the data pad region includes minute slit patterns that extend parallel to the first direction of the data wires, and the data wires have line boundaries of a zigzag shape.
摘要翻译：薄膜晶体管阵列面板包括第一绝缘基板，形成在第一绝缘基板上并沿第一方向延伸的多条数据线，形成在第一绝缘基板上并具有从其延伸的多条数据线的数据焊盘区域以及形成在数据线上的有机层，其中有机层的厚度设置在数据线之上，而不是数据线之间的厚度。数据焊盘区域的有机层的表面包括平行于数据线的第一方向延伸的微细狭缝图案，并且数据线具有之字形形状的线边界。

8. 发明申请

US20100208157A1 LIQUID CRYSTAL DISPLAY AND MANUFACTURING METHOD THEREOF 有权
标题翻译：液晶显示及其制造方法
公开(公告)号：US20100208157A1
公开(公告)日：2010-08-19
申请号：US12507764
申请日：2009-07-22
申请人： Ji-Hyun KWON , Hey-Seok NA , Won-Hee LEE , Ho-Kyoon KWON , Byoung-Sun NA , Dong-Yoon LEE , Ju-Hee LEE , Gwang-Bum KO
发明人： Ji-Hyun KWON , Hey-Seok NA , Won-Hee LEE , Ho-Kyoon KWON , Byoung-Sun NA , Dong-Yoon LEE , Ju-Hee LEE , Gwang-Bum KO
IPC分类号： G02F1/1368 , G02F1/13
CPC分类号： G02F1/136286 , G02F1/134363 , G02F2001/134345 , G09G2300/0426 , G09G2300/0439 , G09G2320/0209
摘要： A liquid crystal display (LCD), according to an exemplary embodiment of the present invention, includes a plurality of pixels arranged in a matrix shape. Each of the pixels include a first subpixel and a second subpixel. The pixels include a first thin film transistor transmitting a first data voltage to the first subpixel. The first thin film transistor includes a first source electrode, a first drain electrode, and a first gate electrode. The pixels include a second thin film transistor transmitting a second data voltage to the second subpixel. The second thin film transistor includes a second source electrode, a second drain electrode, and a second gate electrode. A relative position of the first drain electrode with respect to the first source electrode is opposite to a relative position of the second drain electrode with respect to the second source electrode in each pixel.
摘要翻译：根据本发明的示例性实施例的液晶显示器（LCD）包括以矩阵形状排列的多个像素。每个像素包括第一子像素和第二子像素。像素包括向第一子像素发送第一数据电压的第一薄膜晶体管。第一薄膜晶体管包括第一源电极，第一漏电极和第一栅电极。像素包括向第二子像素传输第二数据电压的第二薄膜晶体管。第二薄膜晶体管包括第二源电极，第二漏电极和第二栅电极。第一漏电极相对于第一源电极的相对位置与第二漏电极相对于每个像素中的第二源电极的相对位置相反。

9. 发明授权

US09343028B2 Method of driving a gate line, gate drive circuit and display apparatus having the gate drive circuit 有权
标题翻译：驱动栅极线的方法，栅极驱动电路和具有栅极驱动电路的显示装置
公开(公告)号：US09343028B2
公开(公告)日：2016-05-17
申请号：US12423995
申请日：2009-04-15
申请人： Dong-Hyeon Ki , Ho-Kyoon Kwon , Ju-Hee Lee , Byoung-Sun Na
发明人： Dong-Hyeon Ki , Ho-Kyoon Kwon , Ju-Hee Lee , Byoung-Sun Na
IPC分类号： G09G3/36 , G11C19/18 , G11C19/28
CPC分类号： G09G3/3677 , G09G2310/0286 , G11C19/184 , G11C19/28
摘要： A method of driving a gate line includes: charging one of a scan start signal and a carry signal provided from a previous stage to a first node of a present stage; outputting a gate signal through a gate node of the present stage by pulling up a high level of a first clock signal at the first node to boost up a voltage potential of the first node; discharging the voltage potential of the first node and a voltage potential of the gate node to hold the first node and the gate node at a first power voltage as the first clock signal is shifted to a low level; and receiving a voltage potential signal of a second node of the previous stage, the second node holding a gate signal outputted from the previous stage, to reduce a ripple generated at the first node.
摘要翻译：驱动栅极线的方法包括：将扫描开始信号和从前一级提供的进位信号中的一个充电到当前级的第一个节点; 通过在第一节点处拉高高电平的第一时钟信号，通过当前级的门节点输出门信号，以升高第一节点的电压电位; 当第一时钟信号被转换到低电平时，放电第一节点的电压和门节点的电压电位，以将第一节点和门节点保持在第一电源电压; 并且接收前一级的第二节点的电压电位信号，所述第二节点保持从前一级输出的门信号，以减少在第一节点处产生的纹波。

10. 发明授权

US08334539B2 Manufacturing method for contact pads of a thin film transistor array panel, and a thin film transistor array panel having such contact pads 有权
标题翻译：薄膜晶体管阵列面板的接触焊盘的制造方法以及具有这种接触焊盘的薄膜晶体管阵列面板
公开(公告)号：US08334539B2
公开(公告)日：2012-12-18
申请号：US12512623
申请日：2009-07-30
申请人： Dong-Gyu Kim , Yeong-Keun Kwon , Ju-Hee Lee
发明人： Dong-Gyu Kim , Yeong-Keun Kwon , Ju-Hee Lee
IPC分类号： H01L33/00
CPC分类号： H01L27/1248 , G03F1/00 , G03F1/36 , G03F1/50 , H01L27/12 , H01L27/124
摘要： A thin film transistor array panel includes a first insulation substrate, a plurality of data wires formed on the first insulation substrate and extending in a first direction, a data pad region formed on the first insulation substrate and having plural ones of the data wires extending therefrom, and an organic layer formed on the data wires, where the organic layer has a greater thickness where it is disposed over the data wires than the thickness it has between the data wires. The surface of the organic layer of the data pad region includes minute slit patterns that extend parallel to the first direction of the data wires, and the data wires have line boundaries of a zigzag shape.
摘要翻译：薄膜晶体管阵列面板包括第一绝缘基板，形成在第一绝缘基板上并沿第一方向延伸的多条数据线，形成在第一绝缘基板上并具有从其延伸的多条数据线的数据焊盘区域以及形成在数据线上的有机层，其中有机层的厚度设置在数据线之上，而不是数据线之间的厚度。数据焊盘区域的有机层的表面包括平行于数据线的第一方向延伸的微细狭缝图案，并且数据线具有之字形形状的线边界。

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