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1. 发明授权

US07064386B2 Thin film transistor and fabricating method thereof 有权
公开(公告)号：US07064386B2
公开(公告)日：2006-06-20
申请号：US10456587
申请日：2003-06-09
申请人： Joon-Young Yang , Ju-Cheon Yeo
发明人： Joon-Young Yang , Ju-Cheon Yeo
IPC分类号： H01L27/01
CPC分类号： H01L29/66772 , H01L29/78609 , H01L29/78618
摘要： Thin film transistors and methods of fabricating thin film transistors having low OFF state leakage current. The OFF state leakage current reduction is achieved by using doping implantation energies such that the average penetration depth of the doping impurity into the semiconductor, the projected range Rp, is located below the surface of the semiconductor layer, and such that the concentration of impurities remaining at the surface of the semiconductor layer is relatively small.

2. 发明授权

US06924784B1 Method and system of driving data lines and liquid crystal display device using the same 有权
标题翻译：驱动数据线的方法和系统以及使用其的液晶显示装置
公开(公告)号：US06924784B1
公开(公告)日：2005-08-02
申请号：US09573573
申请日：2000-05-19
申请人： Ju Cheon Yeo , Yong Min Ha
发明人： Ju Cheon Yeo , Yong Min Ha
IPC分类号： G02F1/133 , G09G3/20 , G09G3/36
CPC分类号： G09G3/3688 , G09G3/3648 , G09G2310/0248 , G09G2310/0297 , G09G2320/0209 , G09G2330/021 , G09G2330/023
摘要： A data line driving method for a liquid crystal display device that does not require a separate pre-charge circuit and is capable of reducing pre-charge time operates by charging data lines to a desired level in response to a control signal for sampling the data lines. In one aspect, such a data line driving method includes the steps of generating a control signal; mutually short-circuiting the data lines in response to the control signal; pre-charging data lines to a desired level; mutually open-circuiting the data lines in response to the control signal; and sequentially applying video signals to the data lines in response to the control signal. A liquid crystal display device operable according to such a method includes data driving means for generating a pre-charging signal having a desired level; means for generating a control signal; and switching means for commonly applying the pre-charging signal to the data lines in response to the control signal, to pre-charge the data lines.
摘要翻译：用于不需要单独的预充电电路并且能够减少预充电时间的液晶显示装置的数据线驱动方法通过响应于用于对数据线进行采样的控制信号将数据线充电到所需电平来操作。一方面，这种数据线驱动方法包括以下步骤：产生控制信号; 响应于控制信号使数据线相互短路; 将数据线预充电到所需的水平; 响应于控制信号使数据线相互开路; 并响应于控制信号顺序地将视频信号施加到数据线。根据这种方法可操作的液晶显示装置包括用于产生具有期望电平的预充电信号的数据驱动装置; 用于产生控制信号的装置; 以及用于响应于控制信号共同地将预充电信号施加到数据线的开关装置，以对数据线进行预充电。

3. 发明授权

US06661477B2 TFT-LCD having dummy gate electrode and dummy gate insulator 有权
标题翻译： TFT-LCD具有伪栅极电极和虚拟栅极绝缘体
公开(公告)号：US06661477B2
公开(公告)日：2003-12-09
申请号：US09892648
申请日：2001-06-28
申请人： Ju Cheon Yeo , Yong Min Ha , Jae Deok Park
发明人： Ju Cheon Yeo , Yong Min Ha , Jae Deok Park
IPC分类号： G02F1136
CPC分类号： G02F1/136227 , G02F1/1368
摘要： A liquid crystal display and a method for fabricating the same include a first substrate having an active layer with source/drain regions formed therein, a gate line and a data line extending in directions perpendicular to each other formed thereon, a dummy gate insulating film and a dummy gate electrode both formed on the first substrate in fixed patterns isolated from the gate line, an interlayer insulating film on the first substrate inclusive of the dummy gate electrode with a step, a drain electrode formed on the interlayer insulating film to overlap on upper regions of the dummy gate electrode so as to be in contact with the drain region and have a step to the data line, the data line formed on the interlayer insulating having a step to the drain electrode, a passivation film formed on the interlayer insulating film inclusive of the dummy gate electrode and the data line, a contact hole formed to expose the drain electrode overlapped with the dummy gate electrode, and a pixel electrode overlapping upper edges of the data line and in contact with the drain electrode through the contact hole, thereby reducing a vertical crosstalk while a large aperture is achieved, to improve the picture quality.
摘要翻译：液晶显示器及其制造方法包括：具有形成有源/漏区的有源层的第一基板，形成在其上的彼此垂直的方向延伸的栅极线和数据线，虚拟栅极绝缘膜和两个以与栅极线隔离的固定图案的第一基板上形成的虚拟栅极电极，在第一基板上包括具有台阶的伪栅电极的层间绝缘膜，形成在层间绝缘膜上的漏电极，所述虚拟栅电极的区域与所述漏极区域接触并且具有对所述数据线的步长，所述层间绝缘体上形成的具有与所述漏极电极同步的数据线，形成在所述层间绝缘膜上的钝化膜包括虚拟栅电极和数据线，形成为暴露与虚拟栅电极重叠的漏电极的接触孔，以及像素电极将数据线的上边缘重叠并通过接触孔与漏电极接触，从而在实现大光圈的同时降低垂直串扰，从而提高图像质量。

4. 发明授权

US06596568B1 Thin film transistor and fabricating method thereof 有权
标题翻译：薄膜晶体管及其制造方法
公开(公告)号：US06596568B1
公开(公告)日：2003-07-22
申请号：US09698217
申请日：2000-10-30
申请人： Joon-Young Yang , Ju-Cheon Yeo
发明人： Joon-Young Yang , Ju-Cheon Yeo
IPC分类号： H01L2100
CPC分类号： H01L29/66772 , H01L29/78609 , H01L29/78618
摘要： Thin film transistors and methods of fabricating thin film transistors having low OFF state leakage current. The OFF state leakage current reduction is achieved by using doping implantation energies such that the average penetration depth of the doping impurity into the semiconductor, the projected range Rp, is located below the surface of the semiconductor layer, and such that the concentration of impurities remaining at the surface of the semiconductor layer is relatively small.
摘要翻译：薄膜晶体管和制造具有低OFF状态漏电流的薄膜晶体管的方法。通过使用掺杂注入能量使得掺杂杂质进入半导体的平均穿透深度（投影范围Rp）位于半导体层的表面下方并且使得剩余的杂质浓度在半导体层的表面相对较小。

5. 发明授权

US06426743B1 Shift register 有权
标题翻译：移位寄存器
公开(公告)号：US06426743B1
公开(公告)日：2002-07-30
申请号：US09500914
申请日：2000-02-09
申请人： Ju Cheon Yeo , Sang Young Yoon , Jin Sang Kim
发明人： Ju Cheon Yeo , Sang Young Yoon , Jin Sang Kim
IPC分类号： G09G500
CPC分类号： G11C19/28 , G09G3/3677
摘要： In a shift register for driving a pixel row in a liquid crystal display device a plurality of stages are connected: to a high level voltage source, a low level voltage source and a phase-delayed clock signal generator; to row lines; and in cascade, with respect to a scanning signal, for charging and discharging the row lines. Each stage of the shift register has a pull-up transistor, a pull-down transistor, and first to fourth transistors. The pull-up transistor has a control electrode and a conduction path connected between the first clock signal line and the output terminal. The pull-down transistor has a control electrode and a conduction path connected between the low level voltage line and the output terminal. The first and second transistors have conduction paths connected in series between the input terminal and the control electrode of the pull-up transistor, and each has a control electrode connected commonly to the second clock signal line. The first and second transistors allow a voltage to be charged on the control electrode of the pull-up transistor. The third and fourth transistors have conduction paths connected in series between the third clock signal line and the control electrode of the pull-down transistor, and each has a control electrode connected commonly to the third clock signal line. The third and fourth transistors allow a voltage to be charged on the control electrode of the pull-down transistor.
摘要翻译：在用于驱动液晶显示装置中的像素行的移位寄存器中，多级连接到高电平电压源，低电平电压源和相位延迟时钟信号发生器; 到行线并且相对于扫描信号级联，用于对行线进行充电和放电。移位寄存器的每一级具有上拉晶体管，下拉晶体管和第一至第四晶体管。上拉晶体管具有连接在第一时钟信号线和输出端之间的控制电极和导通路径。下拉晶体管具有连接在低电平电压线和输出端之间的控制电极和导通路径。第一和第二晶体管具有串联连接在上拉晶体管的输入端和控制电极之间的导通路径，并且每个具有与第二时钟信号线共同连接的控制电极。第一和第二晶体管允许在上拉晶体管的控制电极上充电电压。第三和第四晶体管具有串联连接在第三时钟信号线和下拉晶体管的控制电极之间的导通路径，并且每个具有与第三时钟信号线共同连接的控制电极。第三和第四晶体管允许在下拉晶体管的控制电极上充电电压。

6. 发明授权

US06556646B1 Shift register 有权
标题翻译：移位寄存器
公开(公告)号：US06556646B1
公开(公告)日：2003-04-29
申请号：US09384899
申请日：1999-08-27
申请人： Ju Cheon Yeo , Sang Young Yoon
发明人： Ju Cheon Yeo , Sang Young Yoon
IPC分类号： G11C1900
CPC分类号： G09G3/3677 , G09G2310/0286 , G11C8/04 , G11C19/00 , G11C19/184 , G11C19/28
摘要： A shift register for driving a pixel row in a liquid crystal display device. In the shift register, a plurality of stages are connected to a high level voltage source, a low level voltage source and a phase-delayed clock signal generator, connected to row lines, and connected, in cascade, with respect to a scanning signal, for charging and discharging the row lines. In each stage of the shift register, an output circuit is provided with a pull-up transistor having a first input electrode for receiving a first clock signal having a delayed phase in comparison to the scanning signal, a first output electrode connected to the raw line and a first control electrode, and a pull-down transistor having a second input electrode connected to the low level voltage source, a second output electrode connected to the row line and a second control electrode. An input circuit responds to the scanning signal to generate a first control signal to be applied to the first control electrode, and responds to a second clock signal having a delayed phase in comparison to the first clock signal to generate a second control signal to be applied to the second control electrode.
摘要翻译：一种用于驱动液晶显示装置中的像素行的移位寄存器。在移位寄存器中，多个级连接到高电平电压源，低电平电压源和相位延迟时钟信号发生器，其连接到行线，并且相对于扫描信号级联连接，用于对行线进行充电和放电。在移位寄存器的每个级中，输出电路设置有上拉晶体管，其具有第一输入电极，用于接收与扫描信号相比具有延迟相位的第一时钟信号;第一输出电极，连接到原线以及第一控制电极和具有连接到低电平电压源的第二输入电极的下拉晶体管，连接到行线的第二输出电极和第二控制电极。输入电路响应于扫描信号以产生要施加到第一控制电极的第一控制信号，并且响应于与第一时钟信号相比具有延迟相位的第二时钟信号以产生要施加的第二控制信号到第二控制电极。

7. 发明授权

US06345085B1 Shift register 有权
标题翻译：移位寄存器
公开(公告)号：US06345085B1
公开(公告)日：2002-02-05
申请号：US09705714
申请日：2000-11-06
申请人： Ju Cheon Yeo , Jin Sang Kim
发明人： Ju Cheon Yeo , Jin Sang Kim
IPC分类号： G11C1900
CPC分类号： G11C19/184 , G11C19/00 , G11C19/28
摘要： A shift register for driving a pixel array is adapted to prevent a defect due to a short of a capacitor. In each stage of the shift register, an output circuit is provided with a pull-up transistor having a first input electrode for receiving a first clock signal, a first output electrode connected to a row line and a first control electrode, and a pull-down transistor having a second input electrode connected to a low-level voltage source, a second output electrode connected to the row line and a second control electrode. An input circuit generates a first control signal to be applied to the first control electrode and a second control signal to be applied to the second control electrode in response to a second clock signal having a phase different from the first clock signal. A first capacitor is connected between the input circuit and the row line, a second capacitor is connected between the second control electrode and the low-level voltage source, and a third capacitor is connected between the first control electrode and the low-level voltage source. At least one of the first to third capacitors has associated therewith a second capacitor connected in series thereto.
摘要翻译：用于驱动像素阵列的移位寄存器适于防止由于电容器短路引起的缺陷。在移位寄存器的每个级中，输出电路设置有上拉晶体管，其具有用于接收第一时钟信号的第一输入电极，连接到行线的第一输出电极和第一控制电极，下降晶体管具有连接到低电平电压源的第二输入电极，连接到行线的第二输出电极和第二控制电极。输入电路响应于具有不同于第一时钟信号的相位的第二时钟信号，产生要施加到第一控制电极的第一控制信号和施加到第二控制电极的第二控制信号。第一电容器连接在输入电路和行线之间，第二电容器连接在第二控制电极和低电平电压源之间，第三电容器连接在第一控制电极和低电平电压源。第一至第三电容器中的至少一个电容器具有与其串联连接的第二电容器。

8. 发明授权

US5973658A Liquid crystal display panel having a static electricity prevention circuit and a method of operating the same 失效
标题翻译：具有静电防止电路的液晶显示面板及其操作方法
公开(公告)号：US5973658A
公开(公告)日：1999-10-26
申请号：US873927
申请日：1997-06-12
申请人： Seong-Gyun Kim , Ju-Cheon Yeo
发明人： Seong-Gyun Kim , Ju-Cheon Yeo
IPC分类号： G02F1/1362 , G09G3/36
CPC分类号： G02F1/136204 , G09G3/3648 , G09G2310/0248 , G09G2310/0251 , G09G2330/04 , Y10S345/904
摘要： A method and apparatus for controlling at least one transmission line in a liquid crystal display includes at least one transmission gate. The liquid crystal display includes a plurality of pixels, and each pixel includes a thin film transistor. At least one thin film transistor is connected to the transmission line. The transmission gate has first and second gates, an input and an output. The input is connected to the transmission line. The transmission gate transmits when one of a first voltage of said first gate is greater than a voltage of said input and a second voltage of said second gate is less than said voltage of said input. A first external terminal is connected to the first gate, a second external terminal is connected to the second gate, and a common external terminal is connected to the output of the transmission gate. When the first and second external terminals apply a floating potential, static electricity generated in the transmission line discharges through the transmission gate to the third external terminal. When a low and high voltage are respectively applied to the first and second external terminals, the transmission gate effectively isolates the transmission line. Alternatively, by applying a high and low voltage, respectively, to the first and second external terminals, the transmission line can be pre-charged via the transmission gate with a voltage applied to the common external terminal.
摘要翻译：用于控制液晶显示器中的至少一条传输线的方法和装置包括至少一个传输门。液晶显示器包括多个像素，并且每个像素包括薄膜晶体管。至少一个薄膜晶体管连接到传输线。传输门具有第一和第二门，输入和输出。输入端连接到传输线。当所述第一门的第一电压之一大于所述输入的电压且所述第二门的第二电压小于所述输入的所述电压时，所述传输门传输。第一外部端子连接到第一栅极，第二外部端子连接到第二栅极，并且公共外部端子连接到传输门的输出端。当第一和第二外部端子施加浮动电位时，传输线中产生的静电通过传输门排放到第三外部端子。当低电压和高电压分别施加到第一和第二外部端子时，传输门有效隔离传输线。或者，通过分别向第一和第二外部端子施加高电压和低电压，可以通过传输门对施加到公共外部端子的电压进行预充电。

9. 发明授权

US07505017B1 Method of driving liquid crystal display 有权
标题翻译：驱动液晶显示的方法
公开(公告)号：US07505017B1
公开(公告)日：2009-03-17
申请号：US09515239
申请日：2000-03-06
申请人： Ju Cheon Yeo , Yong Min Ha , Sang Young Yoon
发明人： Ju Cheon Yeo , Yong Min Ha , Sang Young Yoon
IPC分类号： G09G3/36
CPC分类号： G09G3/3688 , G09G3/3607 , G09G2310/0297
摘要： A liquid crystal display driving method that is adapted to enhance a quality of picture to be displayed on a liquid crystal panel and prevents a distortion of picture. The liquid crystal display driving method drives a liquid crystal display device including a plurality of demultiplexers connected between a data driving circuit and data lines on a liquid crystal panel, and classifying color data signals to be applied to the respective demultiplexers data driver by colors and allowing the color data signals having a same color to be continuously supplied to the data lines by the demultiplexers prior to a different color signal having a different color.
摘要翻译：一种液晶显示驱动方法，其适于提高要显示在液晶面板上的图像的质量并防止图像的失真。液晶显示驱动方法驱动液晶显示装置，其包括连接在数据驱动电路和液晶面板上的数据线之间的多个解复用器，并且通过颜色对应用于各个解复用器数据驱动器的颜色数据信号进行分类，并允许彩色数据信号具有相同的颜色，在具有不同颜色的不同颜色信号之前，由解复用器连续提供给数据线。

10. 发明授权

US06534788B1 Thin film transistor having dual gate structure and a fabricating method thereof 有权
标题翻译：具有双栅极结构的薄膜晶体管及其制造方法
公开(公告)号：US06534788B1
公开(公告)日：2003-03-18
申请号：US09364823
申请日：1999-07-30
申请人： Ju-Cheon Yeo , Hong-Seok Choi , Yong-Min Ha , Sang-Gul Lee
发明人： Ju-Cheon Yeo , Hong-Seok Choi , Yong-Min Ha , Sang-Gul Lee
IPC分类号： H01L2912
CPC分类号： H01L29/6675 , H01L29/41733 , H01L29/78621 , H01L29/78645 , H01L29/78648
摘要： The present invention relates to a thin film transistor and a fabricating method thereof, wherein the source and drain wires are located on a substrate and a double gate structure is provided, whereby the driving capacity of on-current is improved and the degradation of a device is reduced. The TFT includes a substrate, a source electrode, a drain electrode and a lower gate electrode on the substrate, a buffer layer covering an exposed surface of the substrate as well as the source, drain and lower gate electrodes. An active layer is formed on the buffer layer, wherein a source region, a drain region, lightly-doped (LD) regions and a channel region are formed in the active layer. A gate insulating layer is formed on the channel and LD regions. An upper gate electrode is then formed on the gate insulating layer over the channel region. A passivation layer then covers the upper gate electrode. A plurality of contact holes are formed in the buffer and passivation layers, wherein the contact holes expose the source and drain electrodes and the source and drain regions. A first interconnection wire connects the source electrode to the source region. A second interconnection wire connects the drain electrode to the drain region.
摘要翻译：薄膜晶体管及其制造方法技术领域本发明涉及一种薄膜晶体管及其制造方法，其中源极和漏极布线位于基板上，并且提供双栅极结构，由此提高了导通电流的驱动能力和器件的劣化降低了。 TFT包括衬底，源电极，漏电极和下栅电极，覆盖衬底的暴露表面的缓冲层以及源极，漏极和下栅电极。在缓冲层上形成有源层，其中在有源层中形成源极区，漏极区，轻掺杂（LD）区和沟道区。在沟道和LD区域上形成栅极绝缘层。然后在沟道区上的栅绝缘层上形成上栅电极。然后钝化层覆盖上栅电极。在缓冲层和钝化层中形成多个接触孔，其中接触孔暴露出源极和漏极以及源极和漏极区。第一互连线将源电极连接到源极区域。第二互连线将漏极连接到漏极区。

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