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    • 8. 发明授权
    • Fault-tolerant maintenance bus architecture
    • 容错维护总线架构
    • US06633996B1
    • 2003-10-14
    • US09548536
    • 2000-04-13
    • A. Charles SuffinJoseph S. AmatoPaul Joyce
    • A. Charles SuffinJoseph S. AmatoPaul Joyce
    • G06F1100
    • G06F11/2007G06F11/2017G06F11/2038
    • A fault-tolerant maintenance bus architecture provides dual maintenance buses interconnecting each of a plurality of parent circuit boards. The two maintenance buses are each connected to a pair of system management modules (SMMs) that are configured to perform a variety of maintenance bus activities. Within each parent board are a pair of redundant bridges each having a unique address. One bridge is connected to the first maintenance bus while a second bridge is connected to the second maintenance bus of the pair. A child maintenance bus interconnects the two bridges one a child circuit board. The child maintenance bus is itself interconnected with a variety of monitor and control to functions on maintenance bus-compatible subsystem components. The SMMs can address components on each child board individually and receive appropriate responses therefrom. In the event of a bus failure, the other bus can still communicate with child subsystem components via the unaffected bridge.
    • 容错维护总线架构提供了互连多个母电路板中的每一个的双维护总线。 两个维护总线各自连接到一对被配置为执行各种维护总线活动的系统管理模块(SMM)。 每个父板中都有一对冗余桥,每个桥具有唯一的地址。 一个桥连接到第一维护总线,而第二桥连接到该对的第二维护总线。 子维修总线将两个桥连接成一个子电路板。 子维护总线本身与各种监控和控制相互连接,可与维护总线兼容的子系统组件相连。 SMM可以单独处理每个子板上的组件,并从中接收适当的响应。 在总线故障的情况下,其他总线仍然可以通过未受影响的桥与子系统组件通信。