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1. 发明申请

US20110074035A1 SEMICONDUCTOR MEMORY APPARATUS AND METHOD FOR FABRICATING THE SAME 有权
标题翻译：半导体存储装置及其制造方法
公开(公告)号：US20110074035A1
公开(公告)日：2011-03-31
申请号：US12647918
申请日：2009-12-28
申请人： Hyoung Soon YUNE , Joo Hong JEONG
发明人： Hyoung Soon YUNE , Joo Hong JEONG
IPC分类号： H01L23/49 , H01L21/768
CPC分类号： H01L29/7827 , H01L21/76816 , H01L21/76895 , H01L27/105 , H01L27/1052
摘要： A method for fabricating a semiconductor memory apparatus is provided to minimize failure of the semiconductor memory apparatus and to secure a processing margin. The method also provides for minimizing the deterioration of an operating speed and the operational stability, and minimizing the increase of resistance occurring as a result of a reduced processing margin when forming a gate pattern in a peripheral region of the semiconductor memory apparatus. The method includes forming a connection pad in a peripheral region while forming a buried word line in a cell region, and forming a gate pattern in the peripheral region while forming a bit line in the cell region.
摘要翻译：提供一种用于制造半导体存储装置的方法，以最小化半导体存储装置的故障并确保处理余量。该方法还提供了使半导体存储装置的外围区域形成栅极图形时的处理余量减小的结果，最小化工作速度的恶化和操作稳定性的最小化。该方法包括在周边区域中形成连接焊盘，同时在单元区域中形成掩埋字线，并且在周边区域中形成栅极图案，同时在单元区域中形成位线。

2. 发明授权

US5640209A NTSC/PAL video signal conversion apparatus employing ITU-R BT.601 video signal 失效
标题翻译：采用ITU-R BT.601视频信号的NTSC / PAL视频信号转换装置
公开(公告)号：US5640209A
公开(公告)日：1997-06-17
申请号：US615127
申请日：1996-03-14
申请人： Jin Hwan Lee , Chie Teuk Ahn , Joo Hong Jeong , Sang Gyu Park
发明人： Jin Hwan Lee , Chie Teuk Ahn , Joo Hong Jeong , Sang Gyu Park
IPC分类号： H04N7/01
CPC分类号： H04N7/0105
摘要： An NTSC/PAL video signal conversion apparatus employing a ITU-R BT.601 video signal, comprising a timing reference signal decoder for detecting a timing reference signal from external input data in response to an external clock signal, a counting circuit for performing a plurality of counting operations in response to output signals from the timing reference signal decoder and the external clock signal, a write address generator for generating a write address, a write enable signal and a chip enable signal in response to output signals from the counting circuit, a read address generator for generating a read address, a read enable signal and a chip enable signal in response to the output signals from the counting circuit, a first multiplexer for selecting one of the write address from the write address generator and the read address from the read address generator in response to the external clock signal, a first D flip-flop for latching the external input data, a memory for storing output data from the first D flip-flop, a second D flip-flop for latching output data from the memory, a timing reference signal generator for decoding the output signals from the counting circuit, and a second multiplexer for multiplexing an output signal from the timing reference signal generator and output data from the second D flip-flop.
摘要翻译：一种使用ITU-R BT.601视频信号的NTSC / PAL视频信号转换装置，包括用于响应于外部时钟信号从外部输入数据检测定时参考信号的定时参考信号解码器，用于执行多个响应于来自定时参考信号解码器和外部时钟信号的输出信号的计数操作，用于响应于来自计数电路的输出信号产生写入地址的写入地址发生器，写入使能信号和芯片使能信号，读取地址发生器，用于响应于来自计数电路的输出信号而产生读取地址，读取使能信号和芯片使能信号;第一多路复用器，用于从写入地址发生器中选择写入地址和从读取地址生成器以响应于外部时钟信号，用于锁存外部输入数据的第一D触发器，用于存储ou的存储器从第一D触发器输入数据，用于锁存来自存储器的输出数据的第二D触发器，用于对来自计数电路的输出信号进行解码的定时参考信号发生器，以及用于将来自定时参考信号发生器和来自第二D触发器的输出数据。

3. 发明授权

US08338253B2 Forming a buried word line and connection pad for memory apparatus 有权
标题翻译：形成掩埋字线和存储设备的连接垫
公开(公告)号：US08338253B2
公开(公告)日：2012-12-25
申请号：US12647918
申请日：2009-12-28
申请人： Hyoung Soon Yune , Joo Hong Jeong
发明人： Hyoung Soon Yune , Joo Hong Jeong
IPC分类号： H01L21/336 , H01L29/66
CPC分类号： H01L29/7827 , H01L21/76816 , H01L21/76895 , H01L27/105 , H01L27/1052
摘要： A method for fabricating a semiconductor memory apparatus is provided to minimize failure of the semiconductor memory apparatus and to secure a processing margin. The method also provides for minimizing the deterioration of an operating speed and the operational stability, and minimizing the increase of resistance occurring as a result of a reduced processing margin when forming a gate pattern in a peripheral region of the semiconductor memory apparatus. The method includes forming a connection pad in a peripheral region while forming a buried word line in a cell region, and forming a gate pattern in the peripheral region while forming a bit line in the cell region.
摘要翻译：提供一种用于制造半导体存储装置的方法，以最小化半导体存储装置的故障并确保处理余量。该方法还提供了使半导体存储装置的外围区域形成栅极图形时的处理余量减小的结果，最小化工作速度的恶化和操作稳定性的最小化。该方法包括在周边区域中形成连接焊盘，同时在单元区域中形成掩埋字线，并且在周边区域中形成栅极图案，同时在单元区域中形成位线。

4. 发明申请

US20090117495A1 METHOD FOR FORMING A PATTERN IN A SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING A FLASH MEMORY DEVICE 审中-公开
标题翻译：在半导体器件中形成图案的方法和用于制造闪存存储器件的方法
公开(公告)号：US20090117495A1
公开(公告)日：2009-05-07
申请号：US12119926
申请日：2008-05-13
申请人： Joo Hong Jeong
发明人： Joo Hong Jeong
IPC分类号： G03F7/26
CPC分类号： H01L21/31144 , H01L21/0337
摘要： A pattern formation method of a semiconductor device, and to a manufacturing method of a flash memory, in which spacer patterning technology is performed while two hard mask layers having a different etching characteristics are used, such that the patterning can be performed by using only a spacer as a mask in the region which requires a small pattern. Additionally, the patterning can be performed by using a hard mask layer pattern and the spacer as a mask in a region which requires a large pattern. Therefore, the pattern formation method of the invention can be used to form a semiconductor device with patterns having various sizes using just a single patterning.
摘要翻译：半导体器件的图案形成方法和闪存的制造方法，其中使用间隔物图案化技术，同时使用具有不同蚀刻特性的两个硬掩模层，使得图案化可以仅通过使用间隔物作为需要小图案的区域中的掩模。此外，可以通过在需要大图案的区域中使用硬掩模层图案和间隔物作为掩模来执行图案化。因此，本发明的图案形成方法可以用于仅使用单一图案形成具有各种尺寸的图案的半导体器件。

5. 发明授权

US5734420A Film mode video sequence detector 失效
标题翻译：电影模式视频序列检测器
公开(公告)号：US5734420A
公开(公告)日：1998-03-31
申请号：US572268
申请日：1995-12-13
申请人： Young Sun Lee , Jin Hwan Lee , Yo Sung Ho , Joo Hong Jeong
发明人： Young Sun Lee , Jin Hwan Lee , Yo Sung Ho , Joo Hong Jeong
IPC分类号： H04N5/87 , G06T9/00 , H04N5/253 , H04N5/92 , H04N7/01 , H04N19/00 , H04N19/129 , H04N19/134 , H04N19/142 , H04N19/157 , H04N19/162 , H04N19/196 , H04N19/85 , H04N19/87 , H04N7/18
CPC分类号： H04N7/0115
摘要： A film mode video sequence detector for detecting video sequences converted from movie films in 30 Hz frame rate video resources comprises a video signal detecting means provided a mean of absolute difference (MAD) value of input video signal and a film mode condition generation signal considering a user threshold and still picture, making a decision whether the input signal is film mode, and transmitting the film mode condition generation signal, film mode departure signal, the threshold pass signal, and a clock which is generated on film mode condition; a condition generating means provided the MAD value and the condition generating signal from the video mode detecting means, making a decision whether the MAD value shows a pattern off film mode considering still picture, transmitting the film mode condition generating signal to the video signal detecting means; a mode converting means provided an input field decision signal, a screen transition generating signal, departure signal from video mode decision means, a threshold pass signal, and a generating film mode departure signal considering secreen transition; a video mode decision means film mode departure signal from the mode converting means, clock when the signal from the video signal detecting means is film mode; and a video mode decision means being provided a user threshold and a transmitting video mode generating signal.
摘要翻译：一种用于检测以30Hz帧速率视频资源从电影胶片转换的视频序列的胶片模式视频序列检测器，包括视频信号检测装置，其提供输入视频信号的绝对差值（MAD）值和考虑到用户阈值和静止图像，判定输入信号是否为胶片模式，以及发送胶片模式条件生成信号，胶片模式偏离信号，阈值通过信号以及在胶片模式条件下产生的时钟; 条件产生装置提供来自视频模式检测装置的MAD值和条件产生信号，判定MAD值是否显示考虑静止图像的胶片模式，将胶片模式条件生成信号发送到视频信号检测装置 ; 模式转换装置提供输入场决定信号，画面转换产生信号，来自视频模式判定装置的出发信号，阈值通过信号和考虑到屏幕转换的生成影片模式离开信号; 视频模式决定是指来自模式转换装置的电影模式偏离信号，来自视频信号检测装置的信号是电影模式时的时钟; 并且为用户阈值和发送视频模式生成信号提供视频模式判定装置。

6. 发明授权

US5694179A Apparatus for estimating a half-pel motion in a video compression method 失效
标题翻译：用于在视频压缩方法中估计半像素运动的装置
公开(公告)号：US5694179A
公开(公告)日：1997-12-02
申请号：US717733
申请日：1996-09-19
申请人： Jin Suk Kwak , Kang Whan Lee , Jin Woong Kim , Young Sun Lee , Joo Hong Jeong , Chie Teuk Ahn
发明人： Jin Suk Kwak , Kang Whan Lee , Jin Woong Kim , Young Sun Lee , Joo Hong Jeong , Chie Teuk Ahn
IPC分类号： H04N7/36 , H04N7/32
CPC分类号： H04N19/523
摘要： An apparatus for estimating a half-pel motion comprising: a memory for storing motion-compensation errors in integer-pel positions; an address generator for generating an address of the integer-pel positions to the memory; an operator for receiving the motion-compensation errors from the memory, and calculating motion-compensation errors in the eight half-pel positions which are on the outskirts of the integer-pel position having a minimum motion-compensation error; and a comparator and half-pel motion vector selector for comparing the motion-compensation errors in the eight half-pel positions with the minimum motion-compensation error in the integer-pel position and selecting a position having a minimum motion-compensation error as a final half-pel motion vector.
摘要翻译：一种用于估计半像素运动的装置，包括：用于存储整数像素位置的运动补偿误差的存储器; 地址发生器，用于向存储器生成整数像素位置的地址; 用于从存储器接收运动补偿误差的运算器，以及计算在具有最小运动补偿误差的整数像素位置的郊外的八个半像素位置中的运动补偿误差; 以及用于将八个半像素位置中的运动补偿误差与整数像素位置中的最小运动补偿误差进行比较的比较器和半像素运动矢量选择器，并且将具有最小运动补偿误差的位置选择为最终半像素运动矢量。

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