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    • 4. 发明申请
    • CMOS image sensor and method for forming the same
    • US20060121640A1
    • 2006-06-08
    • US11280694
    • 2005-11-16
    • Jong-Chae Kim
    • Jong-Chae Kim
    • H01L21/00H01L21/44
    • H01L27/14609H01L27/14687
    • A CMOS image sensor and a method for forming the same are provided. According to the method, a gate insulating layer and a doped polysilicon layer which are sequentially stacked on a substrate are patterned to form a transfer gate and a reset gate set apart from each other. A floating diffusion layer between the transfer gate and the reset gate, a light receiving element at a side of the transfer gate away from and opposite to the floating diffusion layer and a source/drain region at a side of the reset gate away from and opposite to the floating diffusion layer are formed. An insulation layer and a mold layer are sequentially formed on an entire surface of the substrate, and the mold layer is planarized until the insulation layer is exposed. The exposed insulation layer is removed to further expose an upper surface of the gates. A selective silicidation process is carried out using a metal gate layer to form a metal gate silicide on the exposed gate. The sequential steps in the selective silicidation process alleviate the metal contamination prevalent in various wet cleaning processes that may increase the malfunction of CMOS image sensors.
    • 6. 发明授权
    • Method of fabricating semiconductor device having a dual-gate
    • 制造具有双栅极的半导体器件的方法
    • US06218229B1
    • 2001-04-17
    • US08962240
    • 1997-10-31
    • Kang-Sik YounHong-Bae ParkJong-Chae Kim
    • Kang-Sik YounHong-Bae ParkJong-Chae Kim
    • H01L218238
    • H01L21/823842
    • The method of fabricating a semiconductor device having a dual-gate provides a semiconductor substrate with a gate insulating film formed on a first portion and a second portion thereof and a polysilicon layer formed on the gate insulating film. A first dopant of a first conductive type is implanted in the polysilicon layer covering the first portion, and a second dopant of a second conductive type is implanted in the polysilicon layer covering the second portion. Then, the polysilicon layer covering the first portion is selectively etched using a first mask to form a first gate, and a third dopant of the first conductive type is implanted to form source/drain LDD regions on both sides of the first gate. Thereafter, the polysilicon layer covering the second portion is selectively etched using a second mask to form a second gate, and a fourth dopant of the second conductive type is implanted to form source/drain LDD regions on both sides of the second gate.
    • 制造具有双栅极的半导体器件的方法为半导体衬底提供形成在栅极绝缘膜上的第一部分和第二部分上形成的栅极绝缘膜和多晶硅层。 将第一导电类型的第一掺杂剂注入覆盖第一部分的多晶硅层中,并且将第二导电类型的第二掺杂剂注入覆盖第二部分的多晶硅层中。 然后,使用第一掩模选择性地蚀刻覆盖第一部分的多晶硅层,以形成第一栅极,并且注入第一导电类型的第三掺杂剂,以在第一栅极的两侧形成源极/漏极LDD区域。 此后,使用第二掩模选择性地蚀刻覆盖第二部分的多晶硅层,以形成第二栅极,并且注入第二导电类型的第四掺杂剂,以在第二栅极的两侧上形成源极/漏极LDD区域。