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    • 3. 发明授权
    • Apparatus and method for generating constant values
    • 用于产生常数值的装置和方法
    • US07146491B2
    • 2006-12-05
    • US10972769
    • 2004-10-26
    • Jonathan Sean CallanDavid Hennah MansellChristopher PedleyDavid James Seal
    • Jonathan Sean CallanDavid Hennah MansellChristopher PedleyDavid James Seal
    • G06F9/302G06F9/315
    • G06F9/30181G06F9/30032G06F9/30167
    • A data processing apparatus and method for generating constant values is provided. The data processing apparatus comprises a data processing unit operable in response to an instruction to perform a data processing operation on one or more data values. Shift logic is operable to selectively apply a shift operation to data to produce one of the data values for the data processing operation. Further, a plurality of registers are provided for storing data. The instruction has a register specifier field for identifying a register and a shift specifier field for specifying a shift to be applied to that register's data in order to produce one of the data values for the data processing operation. The register specifier field is allocatable a distinguished value, and if the register specifier field has that distinguished value, the shift logic is provided with a predetermined value and generates therefrom one of a plurality of constant values dependent on the shift specified by the shift specifier field, the generated constant value then being used as one of the data values for the data processing operation.
    • 提供了一种用于产生常数值的数据处理装置和方法。 数据处理装置包括数据处理单元,该数据处理单元响应于对一个或多个数据值执行数据处理操作的指令而可操作。 移位逻辑可操作以选择性地对数据应用移位操作以产生用于数据处理操作的数据值之一。 此外,提供多个用于存储数据的寄存器。 指令具有用于识别寄存器的寄存器说明符字段和用于指定要应用于该寄存器的数据的移位的移位说明符字段,以便产生数据处理操作的数据值之一。 寄存器说明符字段是可分配的识别值,并且如果寄存器说明符字段具有该识别值,则向移位逻辑提供预定值,并由此产生取决于由移位说明符字段指定的移位的多个常数值之一 ,然后将所生成的常数值用作数据处理操作的数据值之一。
    • 7. 发明申请
    • Data processing apparatus and method
    • 数据处理装置及方法
    • US20100217937A1
    • 2010-08-26
    • US12379440
    • 2009-02-20
    • Dominic Hugo SymesJonathan Sean CallanHedley James FrancisPaul Gilbert Meyer
    • Dominic Hugo SymesJonathan Sean CallanHedley James FrancisPaul Gilbert Meyer
    • G06F12/12G06F12/02
    • G06F12/0862G06F9/30043G06F9/383G06F12/127G06F2212/6028
    • A data processing apparatus is described which comprises a processor operable to execute a sequence of instructions and a cache memory having a plurality of cache lines operable to store data values for access by the processor when executing the sequence of instructions. A cache controller is also provided which comprises preload circuitry operable in response to a streaming preload instruction received at the processor to store data values from a main memory into one or more cache lines of the cache memory. The cache controller also comprises identification circuitry operable in response to the streaming preload instruction to identify one or more cache lines of the cache memory for preferential reuse. The cache controller also comprises cache maintenance circuitry operable to implement a cache maintenance operation during which selection of one or more cache lines for reuse is performed having regard to any preferred for reuse identification generated by the identification circuitry for cache lines of the cache memory. In this way, a single streaming preload instruction can be used to trigger both a preload of one or more cache lines of data values into the cache memory, and also to mark for preferential reuse another one or more cache lines of the cache memory.
    • 描述了一种数据处理装置,其包括可操作以执行指令序列的处理器和具有多个高速缓存行的高速缓存存储器,该多个高速缓存行可操作以在执行指令序列时存储用于由处理器访问的数据值。 还提供了一种缓存控制器,其包括预加载电路,该预加载电路响应于在处理器处接收到的流预加载指令而可操作以将来自主存储器的数据值存储到高速缓存存储器的一个或多个高速缓存行。 高速缓存控制器还包括可响应于流预加载指令操作的识别电路,以识别用于优先重用的高速缓冲存储器的一个或多个高速缓存行。 高速缓存控制器还包括可操作以实现高速缓存维护操作的高速缓存维护电路,在该高速缓存维护操作期间,考虑到用于高速缓冲存储器的高速缓存行的识别电路的识别电路产生的重用标识的任何优选,执行用于重新使用的一个或多个高速缓 以这种方式,可以使用单个流预加载指令来将数据值的一个或多个高速缓存行的预加载触发到高速缓冲存储器中,并且还用于标记用于优先重用高速缓冲存储器的另一个或多个高速缓存行。