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    • 1. 发明授权
    • Power-on reset circuit
    • 上电复位电路
    • US5376835A
    • 1994-12-27
    • US964806
    • 1992-10-22
    • Michael A. Van BuskirkJohnny C.-L. ChenChung K. ChangLee E. ClevelandAntonio Montalvo
    • Michael A. Van BuskirkJohnny C.-L. ChenChung K. ChangLee E. ClevelandAntonio Montalvo
    • H03K17/22H03K5/153H03K17/687
    • H03K17/223
    • A power-on reset circuit for generating and maintaining a reset signal in an active low state during power-up until a power supply voltage exceeds a predetermined level includes a resetting circuit (12a) and a control logic circuit (12b). The reset circuit is responsive to a monitoring signal, a start-up signal and a reference voltage for generating a reset signal which is initially in the active low state. The reset circuit includes a differential comparator (54) having a first input for receiving the start-up signal, a second input for receiving the reference voltage, and an output for generating the reset signal. The control logic circuit is responsive to the monitoring signal and the reset signal for generating a logic control signal which is initially in a high state. The differential comparator is responsive to the control signal and is activated only after the power supply voltage has exceeded a predetermined level so as to maintain initially the reset signal on its output in the low state. The output of the differential comparator is forced to a high state after the monitoring signal has reached a low state and the start-up signal exceeds the reference voltage. Logic and/or memory circuitry (18) is provided which responds to the reset signal so as to force its outputs to a known logic state.
    • 一种用于在上电期间产生并维持处于低电平状态的复位信号,直到电源电压超过预定电平的上电复位电路包括复位电路(12a)和控制逻辑电路(12b)。 复位电路响应于监视信号,启动信号和用于产生初始处于低电平状态的复位信号的参考电压。 复位电路包括差分比较器(54),其具有用于接收启动信号的第一输入端,用于接收基准电压的第二输入端和用于产生复位信号的输出端。 控制逻辑电路响应于监视信号和复位信号,用于产生最初处于高状态的逻辑控制信号。 差分比较器响应于控制信号,并且仅在电源电压已经超过预定电平后被激活,以便将其输出上的复位信号初始化为低状态。 在监视信号达到低电平并且启动信号超过参考电压之后,差分比较器的输出被强制为高电平。 提供逻辑和/或存储器电路(18),其响应于复位信号,以便将其输出强制到已知的逻辑状态。