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1. 发明授权

US5397747A Vertical chip mount memory package and method 失效
标题翻译：垂直芯片安装存储器封装和方法
公开(公告)号：US5397747A
公开(公告)日：1995-03-14
申请号：US151455
申请日：1993-11-02
申请人： John M. Angiulli , Eugene S. Kolankowsky , Richard R. Konian , Leon L. Wu
发明人： John M. Angiulli , Eugene S. Kolankowsky , Richard R. Konian , Leon L. Wu
IPC分类号： H01L23/12 , H01L25/00 , H01L25/065 , H01L25/18 , H01L27/10 , H01L21/60
CPC分类号： H01L25/18 , H01L25/0652 , H01L2924/0002 , Y10T29/49144
摘要： A packaging substrate (10) is populated with memory chip cube(s) (40) and horizontally mounted interconnect chip(s) (19) mounted on the substrate which are joined during assembly using two kinds of lead tin solder alloys to form memory chip cube. One is a high melting point lead tin alloy (HMA), the other is a lower melting point lead tin alloy (LMA). The memory chip pairs (11) of the memory cube are formed by placing functional memory chips over another functional memory chips before they were diced. The chip pads of the individual memory chips and the lead tin pads of the memory chips within the wafer are aligned and the high melting point lead tin solder is reflowed, forming memory chip pairs. The memory cube (42) is formed by joining the memory chip pairs together in a boat (30) with a silicon bar (41) maintaining spacing during manufacture. The memory chip cube (42) as well as the supporting chips are then placed and joined to the packaging substrate. The supporting silicon bar is removed from the memory chip cube (42) by re-heating the cube after it is joined to the packaging substrate. The package is completed by following with capping of the chip package of the paired memory chip cube with its attached packaging substrate by attaching to the base member substrate an appropriate heat sink after appropriate I/O flex lines are in place.
摘要翻译：封装基板（10）上安装有安装在基板上的存储芯片立方体（40）和水平安装的互连芯片（19），其在组装期间使用两种铅锡焊料合金接合以形成存储芯片立方体。一种是高熔点铅锡合金（HMA），另一种是低熔点铅锡合金（LMA）。存储器立方体的存储器芯片对（11）通过在功能存储器芯片被切割之前将功能存储器芯片放置在另一个功能存储器芯片上而形成。单个存储器芯片的芯片焊盘和晶片内的存储器芯片的引线锡焊盘对准，并且高熔点铅锡焊料回流，形成存储器芯片对。存储器立方体（42）通过在存储器芯片对中将存储芯片组合在一起而形成，所述存储器芯片对在制造期间保持间隔的硅棒（41）在舟皿（30）中。然后将存储芯片立方体（42）以及支撑芯片放置并连接到封装基板。立方体在与包装基板接合后再加热立方体，从存储芯片立方体（42）移除支撑硅棒。通过在配对的存储芯片立方体的芯片封装与其附接的封装基板之间通过在适当的I / O柔性线就位之后附接到基底构件基板上的合适的散热器来完成封装。

2. 发明授权

US5362986A Vertical chip mount memory package with packaging substrate and memory chip pairs 失效
标题翻译：垂直芯片安装存储器封装，封装衬底和存储器芯片对
公开(公告)号：US5362986A
公开(公告)日：1994-11-08
申请号：US109230
申请日：1993-08-19
申请人： John M. Angiulli , Eugene S. Kolankowsky , Richard R. Konian , Leon L. Wu
发明人： John M. Angiulli , Eugene S. Kolankowsky , Richard R. Konian , Leon L. Wu
IPC分类号： H01L23/12 , H01L25/00 , H01L25/065 , H01L25/18 , H01L27/10 , H01L23/498 , H01L23/538
CPC分类号： H01L25/18 , H01L25/0652 , H01L2924/0002 , Y10T29/49144
摘要： A packaging substrate (10) is populated with memory chip cube(s) (40) and horizontally mounted interconnect chip(s) (19)mounted on the substrate which are joined during assembly using two kinds of lead tin solder alloys to form the memory chip cube. One is a high melting point lead tin alloy (HMA), another is a lower melting point lead tin alloy (LMA). The memory chip pairs (11) of the memory cube are formed by placing functional memory chips over other functional memory chips before they were diced. The chip pads of the individual memory chips and the lead tin pads of the memory chips within the wafer are aligned and the high melting point lead tin solder is reflowed, forming memory chip pairs.
摘要翻译：封装基板（10）上安装有安装在基板上的存储芯片立方体（40）和水平安装的互连芯片（19），其在组装期间使用两种铅锡焊料合金接合以形成存储器芯片立方体。一种是高熔点铅锡合金（HMA），另一种是低熔点铅锡合金（LMA）。存储器立方体的存储器芯片组（11）通过在切割之前将功能存储器芯片放置在其它功能存储器芯片上而形成。单个存储器芯片的芯片焊盘和晶片内的存储器芯片的引线锡焊盘对准，并且高熔点铅锡焊料回流，形成存储器芯片对。

3. 发明授权

US5365204A CMOS voltage controlled ring oscillator 失效
标题翻译： CMOS压控环形振荡器
公开(公告)号：US5365204A
公开(公告)日：1994-11-15
申请号：US145364
申请日：1993-10-29
申请人： John M. Angiulli , Arun K. Ghose , Richard R. Konian , Samuel R. Levine , David Meltzer , Wen-Yuan Wang , Leon L. Wu
发明人： John M. Angiulli , Arun K. Ghose , Richard R. Konian , Samuel R. Levine , David Meltzer , Wen-Yuan Wang , Leon L. Wu
IPC分类号： H03K3/03 , H03K3/354 , H03B5/24
CPC分类号： H03K3/354 , H03K3/0315
摘要： A variable frequency digital ring oscillator which can be formed in a small area for use in testing of chips employs a ring oscillator formed of CMOS inverters, transmission gates and capacitors and CMOS logic as a voltage controlled ring oscillator. A wide range of frequency of oscillation is achieved with small number of components. The ring oscillator circuit's oscillator frequency is controlled only by DC voltages, such as may be provided by (but not limited to) a manufacturing chip tester. The output signal of the oscillator swings between Vdd and Vss and does not need additional level translation circuits to drive CMOS logic. The ring oscillator can be composed of an odd number of CMOS inverters connected in cascade to form a loop. We provide a CMOS transmission gate with PMOS and NMOS transistor device inserted between each adjacent inverter and a MOS capacitor connected between the output of each transmission gate and the Vss supply of the ring oscillator circuit (conventionally ground). The gate voltages of the PMOS and NMOS transistors in the transmission gate are different and provide a different DC voltage between Vdd and Vss. Variation of the gate voltages of the transmission gates controls the frequency of oscillation of the circuit. The use of a plurality of cascaded delay elements between inverters achieves a wider range of oscillation frequency than possible with a single delay element.
摘要翻译：可以形成在用于芯片测试的小区域中的可变频数字环形振荡器采用由CMOS反相器，传输门和电容器形成的环形振荡器和作为压控环形振荡器的CMOS逻辑。通过少量组件实现了宽范围的振荡。环形振荡器电路的振荡器频率仅由直流电压控制，例如可以由（但不限于）制造芯片测试器提供。振荡器的输出信号在Vdd和Vss之间摆动，不需要额外的电平转换电路来驱动CMOS逻辑。环形振荡器可以由串联连接的奇数CMOS反相器组成，形成一个环路。我们提供一个CMOS传输门，PMOS和NMOS晶体管器件插在每个相邻的反相器和连接在每个传输门的输出和环形振荡器电路的Vss电源（传统接地）之间的MOS电容器。传输门中PMOS和NMOS晶体管的栅极电压不同，并在Vdd和Vss之间提供不同的直流电压。传输门的栅极电压的变化控制电路的振荡频率。在逆变器之间使用多个级联延迟元件实现比单个延迟元件可能的更宽的振荡频率范围。

4. 发明授权

US5323293A Arrangement for placing central processors and memory in a cryo cooled chamber 失效
标题翻译：将中央处理器和存储器放置在冷冻冷却室中的布置
公开(公告)号：US5323293A
公开(公告)日：1994-06-21
申请号：US993271
申请日：1992-12-18
申请人： John M. Angiulli , Arun K. Ghose , Richard R. Konian , Samuel R. Levine , Kevin P. Moran , Vincent C. Vasile
发明人： John M. Angiulli , Arun K. Ghose , Richard R. Konian , Samuel R. Levine , Kevin P. Moran , Vincent C. Vasile
IPC分类号： H05K7/20
CPC分类号： H05K7/20372
摘要： A low temperature conduction module comprising a cold plate having recesses around the periphery thereof to accommodate memory cubes is disclosed. The recesses accommodating the memory cubes are of such depth and dimension as to enclose the memory cube on all but one side, thereby greatly enhancing the conduction of the heat generated by the memory cube to the cold plate. The memory cube may be surrounded by a material which possesses excellent thermal conductive properties to insure efficient transfer of the heat from the memory cube to the cold plate. The plurality of memory cubes so positioned within the cold plate may be connected by a flexible cable surrounding the cold plate and having branch conductors extending to connect with computer processors enclosed within the same low temperature conduction module.
摘要翻译：公开了一种低温传导模块，其包括具有围绕其周边的凹部以容纳存储器立方体的冷板。容纳存储器立方体的凹部具有如此的深度和尺寸，以便将记忆立方体包围在除了一侧之外的所有记忆立方体上，从而大大增强了存储立方体产生的热传导到冷板。记忆立方体可以被具有优异导热性质的材料所围绕，以确保将热量从存储立方体有效地传递到冷板。如此定位在冷板内的多个存储器立方体可以通过围绕冷板的柔性电缆连接，并且具有延伸的分支导体以与封闭在同一低温传导模块内的计算机处理器连接。

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