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1. 发明授权

US07729168B2 Reduced signal level support for memory devices 有权
标题翻译：降低对存储器件的信号级支持
公开(公告)号：US07729168B2
公开(公告)日：2010-06-01
申请号：US11769870
申请日：2007-06-28
申请人： John F. Zumkehr , James E. Chandler , Jeffrey E. Smith
发明人： John F. Zumkehr , James E. Chandler , Jeffrey E. Smith
IPC分类号： G11C16/06
CPC分类号： G11C5/147
摘要： Embodiments of the invention are generally directed to systems, methods, and apparatuses for reduced signal level support for memory devices. In some embodiments, a host includes one or more additional electrical contacts to provide a controllable voltage reference to a memory device. The host may also include driver circuitry to provide a driver signal to the memory device. In some embodiments, the driver signal is substantially symmetrical around the controllable voltage reference.
摘要翻译：本发明的实施例一般涉及用于减少对存储器件的信号级支持的系统，方法和装置。在一些实施例中，主机包括一个或多个额外的电触点，以向存储器件提供可控电压参考。主机还可以包括用于向存储器件提供驱动器信号的驱动器电路。在一些实施例中，驱动器信号基本上围绕可控电压基准对称。

2. 发明授权

US07152008B2 Calibrated differential voltage crossing 失效
公开(公告)号：US07152008B2
公开(公告)日：2006-12-19
申请号：US11013255
申请日：2004-12-15
申请人： John F. Zumkehr , James E. Chandler , Renjeng Chiang
发明人： John F. Zumkehr , James E. Chandler , Renjeng Chiang
IPC分类号： G01R35/00 , G06F19/00
CPC分类号： G01R25/00
摘要： In general, in one aspect, the disclosure describes an apparatus for calibrating signals. The apparatus includes a receiver pair to receive a differential signal and a reference signal and to generate at least one comparison signal reflecting where a first signal of the differential signal and a second signal of the differential signal cross each other with respect to the reference signal. The second signal is a negative compliment of the first signal. The apparatus further includes a phase detector to determine a phase error based on the at least one comparison signal. The apparatus also includes an edge delay control driver pair to adjust the differential signal based on the phase error.

3. 发明授权

US06864731B2 Method and device for symmetrical slew rate calibration 失效
公开(公告)号：US06864731B2
公开(公告)日：2005-03-08
申请号：US10441654
申请日：2003-05-19
申请人： John F. Zumkehr , James E. Chandler
发明人： John F. Zumkehr , James E. Chandler
IPC分类号： H03K19/003 , H03K5/12
CPC分类号： H03K19/00384
摘要： A device and method for calibrating a slew rate is disclosed. The slew rate may be for a driver of a bi-directional buffer. A driver outputs a signal having a frequency. A receiver is coupled to the driver. A frequency counter measures the frequency of the signal. A calibrated slew rate is determined by the frequency of a waveform of the signal. Different waveforms may be determined for the pull-up and pull-down calibrations.

4. 发明授权

US06629225B2 Method and apparatus for control calibration of multiple memory modules within a memory channel 有权
公开(公告)号：US06629225B2
公开(公告)日：2003-09-30
申请号：US09872179
申请日：2001-05-31
申请人： John F. Zumkehr
发明人： John F. Zumkehr
IPC分类号： G06E1300
CPC分类号： G06F13/4239
摘要： A method and apparatus for control calibration of multiple memory modules within a memory channel is described. The method selects a memory channel from one or more memory channels coupled to a controller. Next, a memory module, coupled to the memory channel, is selected. A path delay is then determined for the selected memory module. The path delay includes a time interval for receipt of a data signal following issuance of a command by the controller to the selected memory module. Once determined, the path delay is stored, such that when the controller issues a command to a selected memory module, a controller receiver is enabled to capture a data signal following a time interval, as defined by the path delay, from issuance of the command. This process is repeated until a path delay is determined for each memory module of each memory channel coupled to the controller.

5. 发明授权

US06173414B2 Systems and methods for reduced error detection latency using encoded data 失效
标题翻译：使用编码数据减少错误检测延迟的系统和方法
公开(公告)号：US06173414B2
公开(公告)日：2001-01-09
申请号：US09076607
申请日：1998-05-12
申请人： John F. Zumkehr , Amir A. Abouelnaga
发明人： John F. Zumkehr , Amir A. Abouelnaga
IPC分类号： G06F1100
CPC分类号： G06F11/1654 , G06F11/1641
摘要： A fault-tolerant data processing system includes first and second microcircuits in a master/checker configuration. The first and second microcircuits perform identical transforming operations on identical data to generate respective outputs. The internal state of each microcircuit is encoded to a short code word and communicated to an external comparator. The comparator compares the encoded internal state data of the first and second microcircuits to determine if an error has occurred. Low error detection latency may be realized due to increased frequency of error detection, with minimal hardware and performance overhead.
摘要翻译：容错数据处理系统包括主/检查器配置中的第一和第二微电路。第一和第二微电路在相同数据上执行相同的变换操作以产生相应的输出。每个微电路的内部状态被编码为短码字并传送到外部比较器。比较器比较第一和第二微电路的经编码的内部状态数据，以确定是否发生错误。由于错误检测的频率增加，硬件和性能开销最小，可能会实现低错误检测延迟。

6. 发明授权

US07095245B2 Internal voltage reference for memory interface 有权
标题翻译：存储器接口的内部参考电压
公开(公告)号：US07095245B2
公开(公告)日：2006-08-22
申请号：US10714075
申请日：2003-11-14
申请人： John F. Zumkehr , James E. Chandler , Ray I. Chiang
发明人： John F. Zumkehr , James E. Chandler , Ray I. Chiang
IPC分类号： H03K19/00
CPC分类号： G11C5/147 , G11C2207/2254
摘要： Embodiments of the invention include a memory controller to interface to memory. In one embodiment, the memory controller includes a pull-up calibration terminal to couple to an external pull-up resistor, a pull-down calibration terminal to couple to an external pull-down resistor, a voltage reference node, a first switch coupled between the pull-up calibration terminal and the voltage reference node, and a second switch coupled between the pull-down calibration terminal and the voltage reference node. The first switch and the second switch may be selectively closed to generate an internal voltage reference on the voltage reference node in a normal mode that may be used for comparison with an input signal to receive data.
摘要翻译：本发明的实施例包括与存储器接口的存储器控制器。在一个实施例中，存储器控制器包括耦合到外部上拉电阻器的上拉校准端子，耦合到外部下拉电阻器的下拉校准端子，电压参考节点，耦合在上拉校准端子和电压参考节点，以及耦合在下拉校准端子和电压参考节点之间的第二开关。可以选择性地关闭第一开关和第二开关以在正常模式下在电压参考节点上产生内部参考电压，该正常模式可用于与输入信号进行比较以接收数据。

7. 发明授权

US07036053B2 Two dimensional data eye centering for source synchronous data transfers 失效
标题翻译：用于源同步数据传输的二维数据眼心
公开(公告)号：US07036053B2
公开(公告)日：2006-04-25
申请号：US10324864
申请日：2002-12-19
申请人： John F. Zumkehr , John L. Bryan , Howard S. David , Klaus Ruff
发明人： John F. Zumkehr , John L. Bryan , Howard S. David , Klaus Ruff
IPC分类号： G01R31/3183
CPC分类号： G11C7/1066 , G11C7/1051 , G11C29/02 , G11C2207/2254
摘要： A method for optimizing a source synchronous clock reference signal timing to capture data from a memory device (e.g., DDR SDRAM) includes conducting an iterative two-dimensional data eye search for optimizing the delay of the source synchronous clock reference signal (e.g., DQS). Embodiments of the present invention are directed to tuning the delay for each device for the optimal margin in two dimensions: maximize the distance from the data eye walls and maximize the noise margin on the interface. An iterative data eye search is performed while varying the DQS delay timing and noise margin.
摘要翻译：用于优化源同步时钟参考信号定时以从存储器件（例如，DDR SDRAM）捕获数据的方法包括进行迭代二维数据眼搜索以优化源同步时钟参考信号（例如，DQS）的延迟，。本发明的实施例涉及在两个维度中调整每个设备的延迟以获得最佳余量：使距离数据眼壁的距离最大化并且使接口上的噪声容限最大化。在改变DQS延迟定时和噪声容限的同时进行迭代数据眼搜索。

8. 发明授权

US06622227B2 Method and apparatus for utilizing write buffers in memory control/interface 有权
公开(公告)号：US06622227B2
公开(公告)日：2003-09-16
申请号：US09749074
申请日：2000-12-27
申请人： John F. Zumkehr , Pete D. Vogt
发明人： John F. Zumkehr , Pete D. Vogt
IPC分类号： G06F1206
CPC分类号： G06F13/4004
摘要： According to one aspect of the invention, a method is provided in which one or more write commands and their corresponding write data are received from a first device. The corresponding write data may be delayed by the first device by a first delay period. The one or more write commands and their corresponding write data are stored in a set of buffers. In response to another write command being received from the first device, a buffered write command and its corresponding write data are sent to a second device for execution, without waiting for the write data corresponding to said another write command to be sent from the first device.

9. 发明授权

US5974529A Systems and methods for control flow error detection in reduced instruction set computer processors 失效
标题翻译：在精简指令集计算机处理器中控制流量错误检测的系统和方法
公开(公告)号：US5974529A
公开(公告)日：1999-10-26
申请号：US76361
申请日：1998-05-12
申请人： John F. Zumkehr , Amir A. Abouelnaga
发明人： John F. Zumkehr , Amir A. Abouelnaga
IPC分类号： G06F9/30 , G06F11/28 , G06F11/36 , G06F9/38 , G06F11/14 , G06F9/39
CPC分类号： G06F11/362 , G06F11/28 , G06F9/3005
摘要： An instruction flow monitoring mechanism performs control flow error detection in a reduced instruction set computer (RISC) processor using signature monitoring. The signature monitoring is integrated into the RISC processor such that the instruction set of the RISC processor is enhanced to perform signature checking under all execution conditions. A signature monitor instruction causes the instruction flow to be checked for errors by comparing a pre-computed reference signature with a current signature and raising an error condition if the two signatures are unequal. The instruction also initializes the current signature.
摘要翻译：指令流监视机制使用签名监控在简化指令集计算机（RISC）处理器中执行控制流错误检测。签名监控被集成到RISC处理器中，使得RISC处理器的指令集被增强以在所有执行条件下执行签名检查。签名监视器指令通过将预先计算的参考签名与当前签名进行比较来引起对错误的检查，并且如果两个签名不相等则提高错误条件。该指令也初始化当前的签名。

10. 发明授权

US07046062B2 Method and device for symmetrical slew rate calibration 有权
公开(公告)号：US07046062B2
公开(公告)日：2006-05-16
申请号：US11075826
申请日：2005-03-08
申请人： John F. Zumkehr , James E. Chandler
发明人： John F. Zumkehr , James E. Chandler
IPC分类号： H03K5/12
CPC分类号： H03K19/00384
摘要： A device and method for calibrating a slew rate is disclosed. The slew rate may be for a driver of a bi-directional buffer. A driver outputs a signal having a frequency. A receiver is coupled to the driver. A frequency counter measures the frequency of the signal. A calibrated slew rate is determined by the frequency of a waveform of the signal. Different waveforms may be determined for the pull-up and pull-down calibrations.

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