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1. 发明申请

US20080253608A1 Systems, Devices, and/or Methods for Managing Images 有权
标题翻译：用于管理图像的系统，设备和/或方法
公开(公告)号：US20080253608A1
公开(公告)日：2008-10-16
申请号：US12045100
申请日：2008-03-10
申请人： Richard G. Long , Ming Lei , Jeffrey C. Snyder , John E. Agapakis
发明人： Richard G. Long , Ming Lei , Jeffrey C. Snyder , John E. Agapakis
IPC分类号： G06K9/00 , G06K9/34 , H04N5/225
CPC分类号： G06T7/0004 , G06K7/14 , G06T7/194 , G06T7/70 , G06T2207/30108 , G06T2207/30204 , G06T2207/30232
摘要： Certain exemplary embodiments can provide a method comprising, responsive to a determination that a machine-readable two-dimensional code has been identified in a first image, said first image comprising a first plurality of pixels defining said machine-readable two-dimensional code and second plurality of pixels defining a non-code zone, automatically causing a saving or displaying of a second image that comprises said machine-readable two-dimensional code or a representation of said machine-readable two-dimensional code and that excludes said non-code zone.
摘要翻译：某些示例性实施例可以提供一种方法，其包括响应于在第一图像中已经识别出机器可读二维码的确定，所述第一图像包括限定所述机器可读二维码的第一多个像素和第二定义非代码区域的多个像素，自动导致保存或显示包括所述机器可读二维代码的第二图像或所述机器可读二维代码的表示，并且排除所述非代码区域。

2. 发明授权

US08374383B2 Systems, devices, and/or methods for managing images 有权
标题翻译：用于管理图像的系统，设备和/或方法
公开(公告)号：US08374383B2
公开(公告)日：2013-02-12
申请号：US12045100
申请日：2008-03-10
申请人： Richard G. Long , Ming Lei , Jeffrey C. Snyder , John E. Agapakis
发明人： Richard G. Long , Ming Lei , Jeffrey C. Snyder , John E. Agapakis
IPC分类号： G06K9/00
CPC分类号： G06T7/0004 , G06K7/14 , G06T7/194 , G06T7/70 , G06T2207/30108 , G06T2207/30204 , G06T2207/30232
摘要： Certain exemplary embodiments can provide a method comprising, responsive to a determination that a machine-readable two-dimensional code has been identified in a first image, said first image comprising a first plurality of pixels defining said machine-readable two-dimensional code and second plurality of pixels defining a non-code zone, automatically causing a saving or displaying of a second image that comprises said machine-readable two-dimensional code or a representation of said machine-readable two-dimensional code and that excludes said non-code zone.
摘要翻译：某些示例性实施例可以提供一种方法，其包括响应于在第一图像中已经识别出机器可读二维码的确定，所述第一图像包括限定所述机器可读二维码的第一多个像素和第二定义非代码区域的多个像素，自动导致保存或显示包括所述机器可读二维代码的第二图像或所述机器可读二维代码的表示，并且排除所述非代码区域。

3. 发明授权

US07062578B2 Flexible processing hardware architecture 有权
标题翻译：灵活的处理硬件架构
公开(公告)号：US07062578B2
公开(公告)日：2006-06-13
申请号：US09977413
申请日：2001-10-15
申请人： David C. Davies , Michael P. Greenberg , Michael J. Wilt , John E. Agapakis
发明人： David C. Davies , Michael P. Greenberg , Michael J. Wilt , John E. Agapakis
IPC分类号： G06F13/00 , H04N7/14
CPC分类号： G06F13/4027 , G06T1/60 , G06T5/20
摘要： A flexible, reconfigurable processing system architecture allows for the implementation of a variety of processing system configurations to be implemented on a single device, which is preferably a PCI bus add-in extension board with an attached daughter card attached and electrically connected thereto through a PCI Mezzanine type connector, and which is plugged into a personal computer PCI expansion slot. The architecture uses the PCI bus, for example, as the local CPU bus for an embedded processor, which not only allows for flexibility in system configuration but also allows PCI devices to be hidden from the host CPU to allow for proper system startup. The architecture further permits an embedded processing CPU to be re-booted when the secondary PCI bus host bus bridge fails to respond without affecting host CPU or other secondary PCI bus peripheral devices. The architecture provides a method of loading an embedded system CPU's local memory with operating system and diagnostic code without the use of ROM or FLASH memory. A system and method of reserving memory is also disclosed which utilizes a dummy or surrogate board with little of no functionality but which has a class code of a common device such as an Ethernet card. The primary system BIOS will read the class code and reserve memory based on the surrogate card. The driver of the non-standard card such as an embedded processor, can then use the memory space allocated to the surrogate card by the BIOS.
摘要翻译：灵活的可重新配置的处理系统架构允许实现在单个设备上实施的各种处理系统配置，其优选地是PCI总线附加扩展板，附加的子卡通过PCI连接并与其电连接夹层式连接器，并插入个人计算机PCI扩展槽。该架构使用PCI总线作为嵌入式处理器的本地CPU总线，这不仅允许系统配置的灵活性，而且允许从主机CPU隐藏PCI设备以允许正确的系统启动。当辅助PCI总线主机总线桥接器无法响应而不影响主机CPU或其他辅助PCI总线外围设备时，架构还允许重新引导嵌入式处理CPU。该架构提供了一种使用操作系统和诊断代码加载嵌入式系统CPU本地存储器的方法，而无需使用ROM或FLASH存储器。还公开了一种保留存储器的系统和方法，其利用具有很少功能但具有诸如以太网卡的公共设备的类代码的虚拟或替代板。主系统BIOS将读取类代码，并根据代理卡预留内存。非标准卡的驱动程序（如嵌入式处理器）可以使用由BIOS分配给替代卡的存储空间。

4. 发明授权

US06308234B1 Flexible processing hardware architecture 失效
标题翻译：灵活的处理硬件架构
公开(公告)号：US06308234B1
公开(公告)日：2001-10-23
申请号：US09030411
申请日：1998-02-25
申请人： David C. Davies , Michael P. Greenberg , Michael J. Wilt , John E. Agapakis
发明人： David C. Davies , Michael P. Greenberg , Michael J. Wilt , John E. Agapakis
IPC分类号： G06F1300
CPC分类号： G06F13/4027 , G06T1/60 , G06T5/20
摘要： A flexible, reconfigurable processing system architecture allows for the implementation of a variety of processing system configurations to be implemented on a single device, which is preferably a PCI bus add-in extension board with an attached daughter card attached and electrically connected thereto through a PCI Mezzanine type connector, and which is plugged into a personal computer PCI expansion slot. The architecture uses the PCI bus, for example, as the local CPU bus for an embedded processor, which not only allows for flexibility in system configuration but also allows PCI devices to be hidden from the host CPU to allow for proper system startup. The architecture further permits an embedded processing CPU to be re-booted when the secondary PCI bus host bus bridge fails to respond without affecting host CPU or other secondary PCI bus peripheral devices. The architecture provides a method of loading an embedded system CPU's local memory with operating system and diagnostic code without the use of ROM or FLASH memory. A system and method of reserving memory is also disclosed which utilizes a dummy or surrogate board with little of no functionality but which has a class code of a common device such as an Ethernet card. The primary system BIOS will read the class code and reserve memory based on the surrogate card. The driver of the non-standard card such as an embedded processor, can then use the memory space allocated to the surrogate card by the BIOS.
摘要翻译：灵活的可重新配置的处理系统架构允许实现在单个设备上实施的各种处理系统配置，其优选地是PCI总线附加扩展板，附加的子卡通过PCI连接并与其电连接夹层式连接器，并插入个人计算机PCI扩展槽。该架构使用PCI总线作为嵌入式处理器的本地CPU总线，这不仅允许系统配置的灵活性，而且允许从主机CPU隐藏PCI设备以允许正确的系统启动。当辅助PCI总线主机总线桥接器无法响应而不影响主机CPU或其他辅助PCI总线外围设备时，架构还允许重新引导嵌入式处理CPU。该架构提供了一种使用操作系统和诊断代码加载嵌入式系统CPU本地存储器的方法，而无需使用ROM或FLASH存储器。还公开了一种保留存储器的系统和方法，其利用具有很少功能但具有诸如以太网卡的公共设备的类代码的虚拟或替代板。主系统BIOS将读取类代码，并根据代理卡预留内存。非标准卡的驱动程序（如嵌入式处理器）可以使用由BIOS分配给替代卡的存储空间。

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