专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20090150732A1 METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR INTEGRATED CIRCUIT RECOVERY TESTING USING SIMULATION CHECKPOINTS 有权
标题翻译：使用模拟检测点进行集成电路恢复测试的方法，系统和计算机程序产品
公开(公告)号：US20090150732A1
公开(公告)日：2009-06-11
申请号：US11951431
申请日：2007-12-06
申请人： Donald Jung , John B. Aylward , Yuk-Ming Ng
发明人： Donald Jung , John B. Aylward , Yuk-Ming Ng
IPC分类号： G01R31/3181 , G06F11/26
CPC分类号： G06F11/263 , G01R31/318357
摘要： A method, system, and computer program product for integrated circuit recovery testing using simulation checkpoints is provided. The method includes executing an error injection test on an integrated circuit that includes a plurality of domains and latches. The error injection test includes injecting an error into one of the domains, clock stopping the domain with the error, performing fencing between the domain with the error and the other domains, and quiescing the other domains. A checkpoint is created of a state of the integrated circuit after the clock stopping, fencing and quiescing have been completed. A mainlines test of the integrated circuit is executed. The mainline test includes applying the checkpoint to the integrated circuit, and performing a recovery reset of the stopped domain. It is determined if the mainline test executed correctly and the results of the determining are output.
摘要翻译：提供了一种使用模拟检查点进行集成电路恢复测试的方法，系统和计算机程序产品。该方法包括在包括多个域和锁存器的集成电路上执行错误注入测试。错误注入测试包括将错误注入到其中一个域中，时钟停止域错误，在错误的域和其他域之间执行防护，并停止其他域。在时钟停止，击剑和静音完成后，创建一个集成电路状态的检查点。执行集成电路的主线测试。主线测试包括将检查点应用于集成电路，并执行停止域的恢复重置。确定是否正确执行主线测试，并输出确定结果。

2. 发明授权

US07721176B2 Method, system, and computer program product for integrated circuit recovery testing using simulation checkpoints 有权
标题翻译：方法，系统和计算机程序产品用于集成电路恢复测试使用模拟检查点
公开(公告)号：US07721176B2
公开(公告)日：2010-05-18
申请号：US11951431
申请日：2007-12-06
申请人： Donald Jung , John B. Aylward , Yuk-Ming Ng
发明人： Donald Jung , John B. Aylward , Yuk-Ming Ng
IPC分类号： G01R31/28 , G06F11/00
CPC分类号： G06F11/263 , G01R31/318357
摘要： A method, system, and computer program product for integrated circuit recovery testing using simulation checkpoints is provided. The method includes executing an error injection test on an integrated circuit that includes a plurality of domains and latches. The error injection test includes injecting an error into one of the domains, clock stopping the domain with the error, performing fencing between the domain with the error and the other domains, and quiescing the other domains. A checkpoint is created of a state of the integrated circuit after the clock stopping, fencing and quiescing have been completed. A mainlines test of the integrated circuit is executed. The mainline test includes applying the checkpoint to the integrated circuit, and performing a recovery reset of the stopped domain. It is determined if the mainline test executed correctly and the results of the determining are output.
摘要翻译：提供了一种使用模拟检查点进行集成电路恢复测试的方法，系统和计算机程序产品。该方法包括在包括多个域和锁存器的集成电路上执行错误注入测试。错误注入测试包括将错误注入到其中一个域中，时钟停止域错误，在错误的域和其他域之间执行防护，并停止其他域。在时钟停止，击剑和静音完成后，创建一个集成电路状态的检查点。执行集成电路的主线测试。主线测试包括将检查点应用于集成电路，并执行停止域的恢复重置。确定是否正确执行主线测试，并输出确定结果。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式