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1. 发明授权

US06323350B1 Process for the oxidation of olefins to olefin oxides 有权
标题翻译：将烯烃氧化成烯烃氧化物的方法
公开(公告)号：US06323350B1
公开(公告)日：2001-11-27
申请号：US09582154
申请日：2000-06-21
申请人： Joerg Lindner , Wolfgang Taeuber , Hans-Juergen Wertgen
发明人： Joerg Lindner , Wolfgang Taeuber , Hans-Juergen Wertgen
IPC分类号： C07D30106
CPC分类号： C07D301/06
摘要： The present invention relates to a liquid phase process for preparing an olefin oxide from an olefin in a cascade of two or more reactors, in a baffled tank reactor or in a plug flow reactor which process comprises the steps of a) contacting the olefin in a solvent with oxygen or an oxygen-containing gas in a first reactor of the reactor cascade or in a first stage of the baffled tank reactor or of the plug flow reactor, thereby producing a mixture comprising olefin oxide, non-converted olefin, solvent and by-products and b) transferring at least a portion of the mixture obtained in step a) to a second reactor of the reactor cascade or to a second stage of the baffled tank reactor or plug flow reactor, adding an additional amount of i) oxygen or an oxygen-containing gas and/or ii) olefin to the mixture and continuing the reaction.
摘要翻译：本发明涉及一种用于在两个或更多个反应器的级联中的烯烃制备烯烃氧化物的液相方法，在挡板反应器或活塞式流动反应器中，该方法包括以下步骤：a）使烯烃在溶剂中接触在反应器的第一反应器级联或在挡板反应器或活塞式流动反应器的第一级中用氧气或含氧气体，从而产生包含烯烃氧化物，未转化的烯烃，溶剂和副产物的混合物，产物和b）将步骤a）中获得的混合物的至少一部分转移到反应器级联的第二反应器中或者向挡板反应器或活塞流反应器的第二阶段转移，加入额外量的i）氧或氧（ii）烯烃混合并继续反应。

2. 发明授权

US08383495B2 Semiconductor layer structure and method for fabricating a semiconductor layer structure 有权
标题翻译：半导体层结构及半导体层结构的制造方法
公开(公告)号：US08383495B2
公开(公告)日：2013-02-26
申请号：US13038479
申请日：2011-03-02
申请人： Brian Murphy , Maik Haeberlen , Joerg Lindner , Bernd Stritzker
发明人： Brian Murphy , Maik Haeberlen , Joerg Lindner , Bernd Stritzker
IPC分类号： H01L21/20 , H01L21/36
CPC分类号： H01L21/02694 , H01L21/02381 , H01L21/02447 , H01L21/02532 , H01L21/02538 , H01L21/02551 , H01L21/02658 , H01L21/26506
摘要： Semiconductor layer structure and a method for producing a structure are provided, including a substrate made of semiconductor material, on which a layer made of a second semiconductor material is situated, furthermore a region (3) enriched with impurity atoms, which region is situated either in layer (2) or at a specific depth below the interface between layer (2) and substrate (1), additionally a layer (4) within the region (3) enriched with impurity atoms, which layer comprises cavities produced by ion implantation, furthermore at least one epitaxial layer (6) applied to layer (2) and also a defect region (5) comprising dislocations and stacking faults within the layer (4) comprising cavities, the at least one epitaxial layer (6) being largely crack-free, and a residual strain of the at least one epitaxial layer (6) being less than or equal to 1 GPa.
摘要翻译：提供半导体层结构和制造结构的方法，包括由半导体材料制成的基板，在其上设置由第二半导体材料制成的层，此外还包括富含杂质原子的区域（3），该区域位于在层（2）中或在层（2）和衬底（1）之间的界面下方的特定深度处，另外在区域（3）内富含杂质原子的层（4），该层包括通过离子注入产生的空穴，此外，施加到层（2）的至少一个外延层（6）还包括在包括空腔的层（4）内的位错和层叠缺陷的缺陷区域（5），所述至少一个外延层（6）所述至少一个外延层（6）的残余应变小于或等于1GPa。

3. 发明申请

US20060267024A1 Semiconductor layer structure and process for producing a semiconductor layer structure 审中-公开
标题翻译：半导体层结构和半导体层结构的制造方法
公开(公告)号：US20060267024A1
公开(公告)日：2006-11-30
申请号：US11438511
申请日：2006-05-22
申请人： Brian Murphy , Maik Haeberlen , Joerg Lindner
发明人： Brian Murphy , Maik Haeberlen , Joerg Lindner
IPC分类号： H01L31/0312
CPC分类号： H01L21/26506
摘要： The invention relates to a semiconductor layer structure of a monocrystalline silicon carbide layer on a ≧150 mm diameter silicon wafer, the silicon carbide layer having a surface roughness of at most 0.5 nm RMS and a micropipe density of at most 1 cm−2 and being free of defects produced during crystal growth or epitaxial deposition, and to a process for producing such a semiconductor layer structure, by implanting carbon ions into a silicon wafer, heat treating the silicon wafer to produce a buried monocrystalline silicon carbide layer and flanking noncrystalline transition regions, followed by removing the upper silicon layer and noncrystalline transition region above the monocrystalline silicon carbide layer, thus uncovering the monocrystalline silicon carbide layer, and chemical mechanical planarizing the monocrystalline silicon carbide layer to a surface roughness of less than 0.5 nm RMS.
摘要翻译：本发明涉及直径> 150mm的硅晶片上的单晶碳化硅层的半导体层结构，该碳化硅层具有至多0.5nm RMS的表面粗糙度和至多1cm 2的微管密度。 -2，并且没有在晶体生长或外延沉积期间产生的缺陷，以及通过将碳离子注入到硅晶片中来制造这种半导体层结构的方法，热处理硅晶片以产生埋入的单晶碳化硅层和侧面非结晶过渡区，然后去除单晶碳化硅层上方的上硅层和非结晶过渡区，从而揭露单晶碳化硅层，并将单晶碳化硅层化学机械平坦化至表面粗糙度较小大于0.5nm RMS。

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