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    • 2. 发明授权
    • Parking brake system
    • 驻车制动系统
    • US07604302B1
    • 2009-10-20
    • US12323437
    • 2008-11-25
    • Joohang LeeHongseop KimJinhee LeeWooyeol Kim
    • Joohang LeeHongseop KimJinhee LeeWooyeol Kim
    • F16H61/12
    • B60T13/662
    • The parking brake system that restricts or releases a parking gear by using an operational force by hydraulic pressure that is generated or removed according to whether the engine works and an operational force by an electromagnetic force, includes a position valve that outputs operational pressure supplied from a hydraulic pressure supplier, to a pressure control valve corresponding to a shift range including a parking range, a parking releasing valve that outputs operational pressure supplied from position valve at the other shift ranges than a parking range, a main actuator that releases a parking gear when an operational force is transmitted from parking releasing valve and restricts the parking gear when the operational force is removed, and/or a sub-actuator that releases the parking gear by providing an operational force to main actuator only when an engine works.
    • 通过使用根据发动机是否产生或除去的液压的操作力和通过电磁力的操作力来限制或释放驻车制动器的驻车制动系统包括输出从 液压供给器,与对应于包括停车范围的换档范围的压力控制阀相对应地设置在从停车范围的另一换档范围输出从位置阀供给的操作压力的停车释放阀, 当操作力被移除时,操作力从驻车释放阀传递并限制驻车档,和/或仅在发动机工作时通过向主执行器提供操作力来释放驻车档的副致动器。
    • 3. 发明授权
    • Manufacturing method of GaAs metal semiconductor FET
    • GaAs金属半导体FET的制造方法
    • US5296394A
    • 1994-03-22
    • US812615
    • 1991-12-26
    • Kyuhwan ShimChulsoon ParkDojin KimSungjae MaengJeonwook YangYoungkyu ChoiJinyeong KangKyungho LeeJinhee Lee
    • Kyuhwan ShimChulsoon ParkDojin KimSungjae MaengJeonwook YangYoungkyu ChoiJinyeong KangKyungho LeeJinhee Lee
    • H01L21/22H01L21/225H01L21/265H01L21/285H01L21/338H01L29/812
    • H01L29/66871H01L21/2258H01L21/26553H01L21/2656H01L21/28575H01L29/812
    • A manufacturing method of GaAs metal semiconductor FET is disclosed. The method comprises the steps of: preparing a GaAs substrate; depositing a silicon layer on the GaAs substrate; forming a first photoresist pattern on the silicon layer by means of well-known image reversal process; etching the silicon layer by means of photolithographic process using the first photoresist pattern as a mask to define ohmic contact regions of source/drain electrodes; forming a second photoresist pattern on the GaAs substrate after removal of the first photoresist pattern to define a channel region; injecting a predetermined quantity of silicon ions into the GaAs substrate to form the channel region; depositing a protective layer around the GaAs substrate after removal of the second photoresist pattern; annealing the substrate deposited with the protective layer to activate silicon ions of the remaining silicon layer and thus diffusing the activating silicon ions into the depth direction of the substrate; forming ohmic contacts on the substrate using an ohmic contact mask after removal of the protective layer and the remaining silicon layer; and forming a gate electrode by using a gate mask.
    • 公开了一种GaAs金属半导体FET的制造方法。 该方法包括以下步骤:制备GaAs衬底; 在GaAs衬底上沉积硅层; 通过公知的图像反转方法在硅层上形成第一光刻胶图案; 通过使用第一光致抗蚀剂图案作为掩模的光刻工艺来蚀刻硅层以限定源极/漏极的欧姆接触区域; 在去除第一光致抗蚀剂图案以限定沟道区域之后,在GaAs衬底上形成第二光致抗蚀剂图案; 将预定量的硅离子注入到GaAs衬底中以形成沟道区; 在移除第二光致抗蚀剂图案之后,在GaAs衬底周围沉积保护层; 使沉积有保护层的衬底退火以激活剩余硅层的硅离子,从而将活化硅离子扩散到衬底的深度方向; 在去除保护层和剩余的硅层之后,使用欧姆接触掩模在衬底上形成欧姆接触; 以及通过使用栅极掩模形成栅电极。
    • 4. 发明授权
    • Manufacturing method of self-aligned GaAs FET using refractory gate of
dual structure
    • 使用双结构耐火栅的自对准GaAs FET的制造方法
    • US5225360A
    • 1993-07-06
    • US813278
    • 1991-12-26
    • Kyuhwan ShimChulsoon ParkDojin KimSungjae MaengJeonwook YangYoungkyu ChoiJinyeong KangKyungho LeeJinhee Lee
    • Kyuhwan ShimChulsoon ParkDojin KimSungjae MaengJeonwook YangYoungkyu ChoiJinyeong KangKyungho LeeJinhee Lee
    • H01L29/812H01L21/285H01L21/338
    • H01L29/66878H01L21/28587
    • There is disclosed a manufacturing method of self-aligned GaAs FET using refractory gate with dual structure, the manufacturing method of the invention comprising the steps of: forming first photoresist pattern on a GaAs substrate to define an active region and ion-implanting n type impurity in the active region of the GaAs substrate; sequentially depositing a nitrogen-containing silicon layer and a metal layer on the substrate after removal of the first photoresist pattern; forming second photoresist pattern on the metal layer to define a gate; removing the silicon and metal layers using the second photoresist pattern as a gate mask to form the gate with dual structure of the silicon and metal layers; forming third photoresist pattern on the substrate to define source/drain regions after removal of the second photoresist pattern, and ion-implanting high-density impurity in the source/drain regions using the third photoresist pattern and the gate as a source/drain mask; annealing the substrate to make the silicon layer as upper side of the gate into metal-silicon-nitride material, and to make bottom portion of the metal layer as lower side of the gate into metal-silicon-nitride material; and forming ohmic contacts on the source/drain regions, respectively. A GaAs FET according to the invention is provided with a gate having low-resistance and improved schottky characteristics.
    • 公开了使用具有双重结构的耐火栅的自对准GaAs FET的制造方法,本发明的制造方法包括以下步骤:在GaAs衬底上形成第一光致抗蚀剂图案以限定有源区和离子注入n型杂质 在GaAs衬底的有源区中; 在去除第一光致抗蚀剂图案之后,在衬底上依次沉积含氮硅层和金属层; 在所述金属层上形成第二光致抗蚀剂图案以限定栅极; 使用第二光致抗蚀剂图案作为栅极掩模去除硅和金属层,以形成具有硅和金属层的双重结构的栅极; 在所述衬底上形成第三光致抗蚀剂图案以在去除所述第二光致抗蚀剂图案之后限定源极/漏极区域,以及使用所述第三光致抗蚀剂图案和所述栅极作为源极/漏极掩模,在所述源极/漏极区域中离子注入高密度杂质; 使基板退火,将作为栅极的上侧的硅层形成为金属 - 氮化硅材料,并使金属层的底部作为栅极的下侧形成金属 - 氮化硅材料; 并分别在源/漏区上形成欧姆接触。 根据本发明的GaAs FET设置有具有低电阻和改善的肖特基特性的栅极。