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    • 1. 发明授权
    • Optoelectronic circuit employing a heterojunction thyristor device to convert a digital optical signal to a digital electrical signal
    • 采用异质结晶闸管器件的光电子电路将数字光信号转换为数字电信号
    • US07595516B2
    • 2009-09-29
    • US12033717
    • 2008-02-19
    • Geoff W. TaylorJianhong Cai
    • Geoff W. TaylorJianhong Cai
    • H01L29/74
    • H01L31/035236B82Y20/00H01L29/155H01L29/205H01L29/66318H01L29/66462H01L29/7373H01L29/802H01L31/03046H01L31/109H03K17/79H03M1/667H03M1/74H03M1/808
    • An optoelectronic circuit includes a resonant cavity formed on a substrate and into which is injected an input digital optical signal that encodes bits of information (each bit representing an OFF logic level or an ON logic level). A heterojunction thyristor device, formed in the resonant cavity, produces an output digital electrical signal corresponding to the input digital optical signal. A sampling clock defines sampling periods that overlap the bits (e.g., ON/OFF pulse durations) in the input digital optical signal. The sampling clock can be in the form of electrical pulses supplied to the n-channel injector terminal(s) and/or p-channel injector terminals of the heterojunction thyristor device. Alternatively, the sampling clock can be in the form of optical pulses that are part of the Optical IN signal that is resonantly absorbed by the device. The heterojunction thyristor device operates in an OFF state and an ON state. In the OFF state, current does not flow between an anode terminal and a cathode terminal of the device; while in the ON state, current flows between the anode terminal and the cathode terminal. To provide optical-to-electrical conversion of the digital bit stream, the heterojunction thyristor device switches from its OFF state to its ON state in the event that, during a given sampling period, the light intensity level of the input digital optical signal corresponds to the ON logic level; however, it does not switch into the ON state (and remains in the OFF state) in the event that, during the given sampling period, the light intensity level of the digital optical signal corresponds to the OFF logic level.
    • 光电子电路包括形成在衬底上的谐振腔,并向其注入输入数字光信号,该信号编码信息位(每个位表示OFF逻辑电平或ON逻辑电平)。 形成在谐振腔中的异质结晶闸管器件产生对应于输入数字光信号的输出数字电信号。 采样时钟定义与输入数字光信号中的位重叠(例如,ON / OFF脉冲持续时间)的采样周期。 采样时钟可以是提供给异质结晶闸管器件的n沟道注入器端子和/或p沟道注入器端子的电脉冲的形式。 或者,采样时钟可以是光脉冲的形式,它们是被装置共振地吸收的光IN信号的一部分。 异质结晶闸管器件工作在OFF状态和ON状态。 在OFF状态下,电流不会在器件的阳极端子和阴极端子之间流动; 而在导通状态下,电流在阳极端子和阴极端子之间流动。 为了提供数字位流的光电转换,在给定采样周期内,输入数字光信号的光强度等于对应于异常结晶闸管器件的异常结晶闸管器件从其OFF状态切换到ON状态 ON逻辑电平; 然而,在给定采样周期内,数字光信号的光强度级别对应于OFF逻辑电平的情况下,它不会切换到ON状态(并保持在OFF状态)。
    • 2. 发明授权
    • Photonic serial digital-to-analog converter employing a heterojunction thyristor device
    • 采用异质结晶闸管器件的光子串行数模转换器
    • US06873273B2
    • 2005-03-29
    • US10323388
    • 2002-12-19
    • Geoff W. TaylorJianhong Cai
    • Geoff W. TaylorJianhong Cai
    • H01L21/331H01L21/335H01L29/15H01L29/80H03K17/79H03M1/66H03M1/74H03M1/80H03M1/00
    • H01L29/155H01L29/66318H01L29/66462H01L29/802H03K17/79H03M1/667H03M1/74H03M1/808
    • A serial photonic digital-to-analog converter employs a heterojunction thyristor device configured for optically-controlled sampling/switching to convert a digital word encoded by a serial digital optical data signal (e.g., serial optical bit stream) into a corresponding analog electrical signal. A voltage reference is operably coupled to the electrical input terminal of the heterojunction thyristor device. The voltage reference cooperates with the heterojunction thyristor device to sequentially generate at its electrical output terminal a voltage signal representing contribution of each bit of the digital word encoded in the serial digital optical data signal. A summing network is operably coupled to the electrical output terminal of the device. The summing network sequentially sums contribution of the voltage signal over the sequence of bits to produce an analog electrical signal corresponding to the digital word for output therefrom. Preferably, the summing network includes an adding node, sample and hold circuit, and a feedback path between the sample and hold circuit and the adding node. In addition, the voltage reference preferably supplies a voltage level corresponding to the maximum voltage level of the analog electrical signal divided by 2(N−1), where N is the number of bits in said digital word, and the feedback path comprises an amplifier that amplifies output of the sample and hold circuit by a factor of 2.
    • 串行光子数模转换器采用异质结晶闸管器件,其配置用于光学控制采样/切换,以将由串行数字光数据信号(例如,串行光比特流)编码的数字字转换成相应的模拟电信号。 电压基准可操作地耦合到异质结晶闸管器件的电输入端子。 电压参考与异质结晶闸管器件协同工作,以在其电输出端依次产生表示在串行数字光数据信号中编码的数字字的每位的贡献的电压信号。 求和网络可操作地耦合到设备的电输出端。 求和网络顺序地将电压信号对比特序列的贡献相加,以产生对应于数字字的模拟电信号,以从其输出。 优选地,求和网络包括加法节点,采样和保持电路以及采样和保持电路与加法节点之间的反馈路径。 此外,电压基准优选地提供与模拟电信号的最大电压电平相对应的电压电平除以2 <(N-1)>,其中N是所述数字字中的位数,并且反馈路径包括 放大器,将采样和保持电路的输出放大2倍。
    • 3. 发明授权
    • Integrated circuit for programmable optical delay
    • 用于可编程光延迟的集成电路
    • US07409120B2
    • 2008-08-05
    • US11424012
    • 2006-06-14
    • Geoff W. TaylorJianhong CaiDaniel C. Upp
    • Geoff W. TaylorJianhong CaiDaniel C. Upp
    • G02B6/12
    • H01Q1/525H03M3/43H03M3/454H03M3/456H04B1/525
    • Interference caused by the propagation of a transmit signal transmitted from a transmit antenna to a receive antenna is effectively cancelled by an improved signal cancellation system. The system includes an interference cancellation signal generator that generates a time-delayed and amplitude-reduced representation of said transmit signal. A summing stage is operably coupled to the interference cancellation signal generator and the receive antenna. The summing stage subtracts the time-delayed and amplitude-reduced representation of the transmit signal from a receive signal to substantially cancel the interference. The interference cancellation signal generator preferably includes a novel programmable optical delay line that introduces a variable amount of optical delay to an optical signal derived from said transmit signal in addition to a thyristor-based sigma delta modulator that converts samples of the transmit signal to into a digital signal in the optical domain.
    • 通过改进的信号消除系统有效地消除由从发射天线发射到接收天线的发射信号的传播引起的干扰。 该系统包括产生所述发射信号的时间延迟和幅度减小的表示的干扰消除信号发生器。 求和级可操作地耦合到干扰消除信号发生器和接收天线。 求和级从接收信号中减去发射信号的时间延迟和幅度减小的表示,以基本上消除干扰。 干扰消除信号发生器优选地包括一种新颖的可编程光学延迟线,其将可变量的光学延迟引入到从所述发射信号导出的光学信号,以及基于可控硅的Σ-Δ调制器,其将发射信号的采样转换为 光域中的数字信号。
    • 4. 发明授权
    • Photonic sigma delta analog-to-digital conversation employing dual heterojunction thyristors
    • 采用双异质结晶闸管的光子Σ-Δ模数转换对话
    • US07064697B2
    • 2006-06-20
    • US10602217
    • 2003-06-24
    • Geoff W. TaylorJianhong CaiDaniel C. Upp
    • Geoff W. TaylorJianhong CaiDaniel C. Upp
    • H03M1/00
    • H01Q1/525H03M3/43H03M3/454H03M3/456H04B1/525
    • Interference caused by the propagation of a transmit signal transmitted from a transmit antenna to a receive antenna is effectively cancelled by an improved signal cancellation system. The system includes an interference cancellation signal generator that generates a time-delayed and amplitude-reduced representation of said transmit signal. A summing stage is operably coupled to the interference cancellation signal generator and the receive antenna. The summing stage subtracts the time-delayed and amplitude-reduced representation of the transmit signal from a receive signal to substantially cancel the interference. The interference cancellation signal generator preferably includes a novel programmable optical delay line that introduces a variable amount of optical delay to an optical signal derived from said transmit signal in addition to a thyristor-based sigma delta modulator that converts samples of the transmit signal to into a digital signal in the optical domain.
    • 通过改进的信号消除系统有效地消除由从发射天线发射到接收天线的发射信号的传播引起的干扰。 该系统包括产生所述发射信号的时间延迟和幅度减小的表示的干扰消除信号发生器。 求和级可操作地耦合到干扰消除信号发生器和接收天线。 求和级从接收信号中减去发射信号的时间延迟和幅度减小的表示,以基本上消除干扰。 干扰消除信号发生器优选地包括一种新颖的可编程光学延迟线,其将可变量的光学延迟引入到从所述发射信号导出的光学信号,以及基于可控硅的Σ-Δ调制器,其将发射信号的采样转换为 光域中的数字信号。
    • 5. 发明授权
    • Heterojunction thyristor-based amplifier
    • 基于异质结晶闸管的放大器
    • US06841806B1
    • 2005-01-11
    • US10602218
    • 2003-06-24
    • Geoff W. TaylorJianhong Cai
    • Geoff W. TaylorJianhong Cai
    • H01L27/08H01L29/15H01L29/74H01L31/111H01L31/0328
    • H01L29/74H01L27/0817H01L29/155H01L31/1113
    • An integrated circuit includes a heterojunction thyristor device having an anode terminal, a cathode terminal, a first injector terminal operably coupled to a first quantum well channel disposed between the anode terminal and the cathode terminal, and a second injector terminal operably coupled to a second quantum well channel disposed between the anode terminal and the cathode terminal. Bias elements operate the heterojunction thyristor device in a mode that provides substantially linear voltage gain for electrical signals supplied to at least one of the first and second injector terminals for output to at least one output node. Preferably, the bias elements include a first DC current source operably coupled to an n-type modulation doped quantum well structure, a second DC current source operably coupled to a p-type modulation doped quantum well structure, a first bias resistance operably coupled between a high voltage supply and the anode terminal, and a second bias resistance operably coupled between the cathode terminal and a low voltage supply. The bias elements provide a current passing from the anode terminal to the cathode terminal that is below a characteristic hold current for the heterojunction thyristor device to thereby inhibit switching of the heterojunction thyristor device. The DC current provided by the DC current sources controls the amount of voltage gain provided by the heterojunction thyristor device.
    • 集成电路包括具有阳极端子,阴极端子,可操作地耦合到设置在阳极端子和阴极端子之间的第一量子阱沟道的第一注入端子的异质结晶闸管器件和可操作地耦合到第二量子阱的第二注入器端子 阱通道设置在阳极端子和阴极端子之间。 偏置元件以对提供给第一和第二注入器端子中的至少一个的电信号提供基本上线性的电压增益以输出到至少一个输出节点的模式来操作异质结晶闸管器件。 优选地,偏置元件包括可操作地耦合到n型调制掺杂量子阱结构的第一DC电流源,可操作地耦合到p型调制掺杂量子阱结构的第二DC电流源,可操作地耦合在 高电压电源和阳极端子,以及可操作地耦合在阴极端子和低电压电源之间的第二偏置电阻。 偏置元件提供从阳极端子到阴极端子的电流,该电流低于异质结晶闸管器件的特性保持电流,从而阻止异质结晶闸管器件的切换。 由直流电流源提供的直流电流控制由异质结晶闸管器件提供的电压增益的量。
    • 6. 发明授权
    • Optoelectronic device employing at least one semiconductor heterojunction thyristor for producing variable electrical/optical delay
    • 使用至少一个半导体异质结晶闸管产生可变电/光延迟的光电器件
    • US06954473B2
    • 2005-10-11
    • US10280892
    • 2002-10-25
    • Rohinton DehmubedGeoff W. TaylorDaniel C. UppJianhong Cai
    • Rohinton DehmubedGeoff W. TaylorDaniel C. UppJianhong Cai
    • H01L21/331H01L21/335H01L29/15H01L29/80H03K17/79H03M1/66H03M1/74H03M1/80H01S3/10
    • H01L29/66318H01L29/155H01L29/66462H01L29/802H03K17/79H03M1/667H03M1/74H03M1/808
    • An optoelectronic integrated circuit includes a resonant cavity formed on a substrate. A heterojunction thyristor device is formed in the resonant cavity and operates to detect an input optical pulse (or input electrical pulse) and produce an output optical pulse via laser emission in response to the detected input pulse. The heterojunction thyristor device includes a channel region that is coupled to a current source that draws current from the channel region. Time delay between the input pulse and output optical pulse may be varied by configuring the current source to draw constant current from the channel region and modulating the intensity of the input pulse, or by varying the amount of current drawn from the channel region by the current source. The heterojunction thyristor device may be formed from a multilayer structure of group III-V materials, or from a multilayer structure of strained silicon materials. A plurality of such heterojunction thyristor based optoelectronic integrated circuits can be used to provide variable pulse delay over a plurality of channels. In addition, the heterojunction thyristor device is easily integrated with other optoelectronic devices formed from the same growth structure to form monolithic optoelectronic integrated circuits suitable for many diverse applications, including phased array communication systems.
    • 光电集成电路包括形成在基板上的谐振腔。 异相结晶闸管器件形成在谐振腔中,用于检测输入光脉冲(或输入电脉冲),并响应于检测到的输入脉冲通过激光发射产生输出光脉冲。 异质结晶闸管器件包括耦合到电流源的沟道区,其从沟道区抽取电流。 输入脉冲和输出光脉冲之间的时间延迟可以通过配置电流源来从通道区域抽取恒定电流并调制输入脉冲的强度,或者通过改变从通道区域引出的电流量来改变电流 资源。 异质结晶闸管器件可以由III-V族材料的多层结构或者由应变硅材料的多层结构形成。 可以使用多个这样的异质结晶闸管的光电集成电路来在多个通道上提供可变的脉冲延迟。 此外,异质结晶闸管器件容易与由相同生长结构形成的其它光电器件集成,以形成适用于许多不同应用的单片光电集成电路,包括相控阵通信系统。
    • 7. 发明授权
    • Optoelectronic circuit employing a heterojunction thyristor device that performs high speed sampling
    • 采用进行高速采样的异质结晶闸管器件的光电子电路
    • US06853014B2
    • 2005-02-08
    • US10323390
    • 2002-12-19
    • Geoff W. TaylorJianhong Cai
    • Geoff W. TaylorJianhong Cai
    • H01L21/331H01L21/335H01L29/15H01L29/80H03K17/79H03M1/66H03M1/74H03M1/80H01L31/072
    • H01L29/155H01L29/66318H01L29/66462H01L29/802H01L31/1113H03K17/79H03M1/667H03M1/74H03M1/808
    • An optoelectronic circuit employing a heterojunction thyristor device that is configured as an optically-controlled (or electrically-controlled) sampling/switching device. First and second channel regions are disposed between the anode terminal and the cathode terminal of the device, and an electrical input terminal and an electrical output terminal are coupled to opposite ends of the first channel region. At least one control signal is supplied to the device. When the control signal corresponds to a predetermined ON condition, sufficient charge is stored in the second channel region to cause the heterojunction thyristor device to operate in an ON state whereby current flows between the anode terminal and the cathode terminal and the electrical input terminal is electrically coupled to the electrical output terminal. When the control signal corresponds to a predetermined OFF condition, the heterojunction thyristor device operates in an OFF state whereby current does not flow between the anode terminal and the cathode terminal and the electrical input terminal is electrically isolated from the electrical output terminal. The control signal can be an optical sampling clock, a digital optical signal encoding bits of information, the combination of a digital optical signal and an optical sampling clock (which defines sampling periods that overlap the bits of information in the digital optical signal), or an electrical sampling clock.
    • 采用被配置为光控(或电控))采样/切换装置的异质结晶闸管器件的光电子电路。 第一和第二通道区域设置在器件的阳极端子和阴极端子之间,并且电输入端子和电输出端子耦合到第一通道区域的相对端。 至少一个控制信号被提供给设备。 当控制信号对应于预定的ON状态时,在第二通道区域中存储足够的电荷,使得异质结晶闸管器件工作在导通状态,由此电流在阳极端子和阴极端子之间流动,并且电输入端子电 耦合到电输出端子。 当控制信号对应于预定的OFF状态时,异质结晶闸管器件工作在OFF状态,由此电流不在阳极端子和阴极端子之间流动,并且电气输入端子与电气输出端子电隔离。 控制信号可以是光采样时钟,编码信息位的数字光信号,数字光信号和光采样时钟(其定义与数字光信号中的信息位重叠的采样周期)的组合,或 电采样时钟。
    • 8. 发明申请
    • Optoelectronic Circuit Employing a Heterojunction Thyristor Device to Convert a Digital Optical Signal to a Digital Electrical Signal
    • 使用异质结晶闸管器件将数字光信号转换为数字电信号的光电路
    • US20080135831A1
    • 2008-06-12
    • US12033717
    • 2008-02-19
    • Geoff W. TaylorJianhong Cai
    • Geoff W. TaylorJianhong Cai
    • H01L27/06
    • H01L31/035236B82Y20/00H01L29/155H01L29/205H01L29/66318H01L29/66462H01L29/7373H01L29/802H01L31/03046H01L31/109H03K17/79H03M1/667H03M1/74H03M1/808
    • An optoelectronic circuit includes a resonant cavity formed on a substrate and into which is injected an input digital optical signal that encodes bits of information (each bit representing an OFF logic level or an ON logic level). A heterojunction thyristor device, formed in the resonant cavity, produces an output digital electrical signal corresponding to the input digital optical signal. A sampling clock defines sampling periods that overlap the bits (e.g., ON/OFF pulse durations) in the input digital optical signal. The sampling clock can be in the form of electrical pulses supplied to the n-channel injector terminal(s) and/or p-channel injector terminals of the heterojunction thyristor device. Alternatively, the sampling clock can be in the form of optical pulses that are part of the Optical IN signal that is resonantly absorbed by the device. The heterojunction thyristor device operates in an OFF state and an ON state. In the OFF state, current does not flow between an anode terminal and a cathode terminal of the device; while in the ON state, current flows between the anode terminal and the cathode terminal. To provide optical-to-electrical conversion of the digital bit stream, the heterojunction thyristor device switches from its OFF state to its ON state in the event that, during a given sampling period, the light intensity level of the input digital optical signal corresponds to the ON logic level; however, it does not switch into the ON state (and remains in the OFF state) in the event that, during the given sampling period, the light intensity level of the digital optical signal corresponds to the OFF logic level.
    • 光电子电路包括形成在衬底上的谐振腔,并向其注入输入数字光信号,该信号编码信息位(每个位表示OFF逻辑电平或ON逻辑电平)。 形成在谐振腔中的异质结晶闸管器件产生对应于输入数字光信号的输出数字电信号。 采样时钟定义与输入数字光信号中的位重叠(例如,ON / OFF脉冲持续时间)的采样周期。 采样时钟可以是提供给异质结晶闸管器件的n沟道注入器端子和/或p沟道注入器端子的电脉冲的形式。 或者,采样时钟可以是光脉冲的形式,它们是被装置共振地吸收的光IN信号的一部分。 异质结晶闸管器件工作在OFF状态和ON状态。 在OFF状态下,电流不会在器件的阳极端子和阴极端子之间流动; 而在导通状态下,电流在阳极端子和阴极端子之间流动。 为了提供数字位流的光电转换,在给定采样周期内,输入数字光信号的光强度等于对应于异常结晶闸管器件的异常结晶闸管器件从其OFF状态切换到ON状态 ON逻辑电平; 然而,在给定采样周期内,数字光信号的光强度级别对应于OFF逻辑电平的情况下,它不会切换到ON状态(并保持在OFF状态)。
    • 9. 发明授权
    • Optoelectronic circuit employing a heterojunction thyristor device to convert a digital optical signal to a digital electrical signal
    • 采用异质结晶闸管器件的光电子电路将数字光信号转换为数字电信号
    • US07332752B2
    • 2008-02-19
    • US10323389
    • 2002-12-19
    • Geoff W. TaylorJianhong Cai
    • Geoff W. TaylorJianhong Cai
    • H01L31/0328
    • H01L31/035236B82Y20/00H01L29/155H01L29/205H01L29/66318H01L29/66462H01L29/7373H01L29/802H01L31/03046H01L31/109H03K17/79H03M1/667H03M1/74H03M1/808
    • An optoelectronic circuit includes a resonant cavity formed on a substrate and into which is injected an input digital optical signal that encodes bits of information (each bit representing an OFF logic level or an ON logic level). A heterojunction thyristor device, formed in the resonant cavity, produces an output digital electrical signal corresponding to the input digital optical signal. A sampling clock defines sampling periods that overlap the bits (e.g., ON/OFF pulse durations) in the input digital optical signal. The sampling clock can be in the form of electrical pulses supplied to the n-channel injector terminal(s) and/or p-channel injector terminals of the heterojunction thyristor device. Alternatively, the sampling clock can be in the form of optical pulses that are part of the Optical IN signal that is resonantly absorbed by the device. The heterojunction thyristor device operates in an OFF state and an ON state. In the OFF state, current does not flow between an anode terminal and a cathode terminal of the device; while in the ON state, current flows between the anode terminal and the cathode terminal. To provide optical-to-electrical conversion of the digital bit stream, the heterojunction thyristor device switches from its OFF state to its ON state in the event that, during a given sampling period, the light intensity level of the input digital optical signal corresponds to the ON logic level; however, it does not switch into the ON state (and remains in the OFF state) in the event that, during the given sampling period, the light intensity level of the digital optical signal corresponds to the OFF logic level.
    • 光电子电路包括形成在衬底上的谐振腔,并向其注入输入数字光信号,该信号编码信息位(每个位表示OFF逻辑电平或ON逻辑电平)。 形成在谐振腔中的异质结晶闸管器件产生对应于输入数字光信号的输出数字电信号。 采样时钟定义与输入数字光信号中的位重叠(例如,ON / OFF脉冲持续时间)的采样周期。 采样时钟可以是提供给异质结晶闸管器件的n沟道注入器端子和/或p沟道注入器端子的电脉冲的形式。 或者,采样时钟可以是光脉冲的形式,它们是被装置共振地吸收的光IN信号的一部分。 异质结晶闸管器件工作在OFF状态和ON状态。 在OFF状态下,电流不会在器件的阳极端子和阴极端子之间流动; 而在导通状态下,电流在阳极端子和阴极端子之间流动。 为了提供数字位流的光电转换,在给定采样周期内,输入数字光信号的光强度等于对应于异常结晶闸管器件的异常结晶闸管器件从其OFF状态切换到ON状态 ON逻辑电平; 然而,在给定采样周期内,数字光信号的光强度级别对应于OFF逻辑电平的情况下,它不会切换到ON状态(并保持在OFF状态)。
    • 10. 发明授权
    • Photonic digital-to-analog converter employing a plurality of heterojunction thyristor devices
    • 采用多个异质结晶闸管器件的光子数模转换器
    • US06995407B2
    • 2006-02-07
    • US10323413
    • 2002-12-19
    • Geoff W. TaylorJianhong Cai
    • Geoff W. TaylorJianhong Cai
    • H01L29/417
    • H01L29/155H01L29/66318H01L29/66462H01L29/74H01L29/802H01L31/02327H01L31/1113H03K17/79H03M1/667H03M1/74H03M1/808
    • A photonic digital-to-analog converter employing a plurality of heterojunction thyristor devices that are configured to convert a digital word encoded by a parallel digital optical signal (e.g., a plurality of synchronous optical bits) to an output analog electrical signal whose magnitude corresponds to the digital word. Each heterojunction thyristor device is configured to convert an optical bit in the digital word to a corresponding digital electrical signal. The voltage levels (e.g., magnitudes) of the ON state of the digital electrical signals produced by the heterojunction thyristor devices may be supplied by voltage divider networks coupled between the cathode terminal of the devices and ground potential or voltage reference sources coupled to the input terminals of the heterojunction thyristor devices. In this manner, electrical signals whose magnitude corresponds to contribution of each optical bit in the digital word are produced. These electrical signals are summed by a summing network to generate the output analog electrical signal corresponding to the digital word.
    • 一种采用多个异质结晶闸管器件的光子数模转换器,其被配置为将由并行数字光信号(例如,多个同步光位)编码的数字字转换为输出模拟电信号,其大小对应于 数字词。 每个异质结晶闸管器件被配置为将数字字中的光学位转换成相应的数字电信号。 由异质结晶闸管器件产生的数字电信号的导通状态的电压电平(例如,大小)可由耦合在器件的阴极端子和耦合到输入端子的地电位或电压参考源之间的分压器网络提供 的异质结晶闸管器件。 以这种方式,产生其幅度对应于数字字中每个光学位的贡献的电信号。 这些电信号由求和网络相加以产生对应于数字字的输出模拟电信号。