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1. 发明授权

US06971077B1 Signal line impedance adjustment tool 有权
标题翻译：信号线阻抗调整工具
公开(公告)号：US06971077B1
公开(公告)日：2005-11-29
申请号：US10366135
申请日：2003-02-13
申请人： Mark D. Frank , Jerimy C. Nelson , Karl J. Bois
发明人： Mark D. Frank , Jerimy C. Nelson , Karl J. Bois
IPC分类号： G06F17/50 , H05K1/02 , H05K3/00
CPC分类号： G06F17/5045 , G06F17/5018 , H05K1/0237 , H05K3/0005
摘要： A computer-implemented method for adjusting impedance is disclosed. A desired impedance value for a signal line in an electrical circuit layout is read, and the signal line is identified in a circuit design database. A window is established around the signal line in which circuit elements will be included in an impedance adjustment for the signal line. The impedance adjustment is performed by adjusting at least one of the circuit elements in the window to bring an impedance of the signal line nearer the desired impedance value.
摘要翻译：公开了一种用于调整阻抗的计算机实现方法。读取电路布局中的信号线的期望阻抗值，并且在电路设计数据库中识别信号线。在信号线周围建立一个窗口，其中电路元件将被包括在信号线的阻抗调整中。通过调整窗口中的至少一个电路元件来实现阻抗调节，以使信号线的阻抗更接近所需阻抗值。

2. 发明授权

US06889367B1 Differential via pair impedance verification tool 有权
标题翻译：差分通路对阻抗验证工具
公开(公告)号：US06889367B1
公开(公告)日：2005-05-03
申请号：US10366205
申请日：2003-02-13
申请人： Mark D. Frank , Jerimy C. Nelson , Karl J. Bois
发明人： Mark D. Frank , Jerimy C. Nelson , Karl J. Bois
IPC分类号： G06F17/50 , H05K1/02 , H05K1/11 , H05K3/00
CPC分类号： G06F17/5036 , H05K1/0237 , H05K1/115 , H05K3/0005
摘要： A computer-implemented method is disclosed for verifying impedance in a differential via pair. A target differential via pair is identified in a design database. A desired modal characteristic impedance for the target differential via pair is obtained. A two-dimensional window is established around the differential via pair in which neighboring vias will be included in a modal characteristic impedance calculation for the target differential via pair. A modal characteristic impedance for the target differential via pair is calculated based at least in part on the neighboring vias in the two-dimensional window. The target differential via pair is flagged if the calculated modal characteristic impedance does not match the desired modal characteristic impedance.
摘要翻译：公开了一种用于验证差分通孔对中的阻抗的计算机实现的方法。目标差分通路对在设计数据库中被识别。获得目标差分通孔对的期望的模态特性阻抗。在差分通孔对周围建立二维窗口，其中相邻通孔将被包括在目标差分通孔对的模态特性阻抗计算中。至少部分地基于二维窗口中的相邻通孔计算目标差分通孔对的模态特性阻抗。如果计算的模态特性阻抗与所需的模态特性阻抗不匹配，则标记目标差分通孔对。

3. 发明授权

US06983434B1 Differential via pair impedance adjustment tool 有权
标题翻译：差分通孔对阻抗调整工具
公开(公告)号：US06983434B1
公开(公告)日：2006-01-03
申请号：US10366489
申请日：2003-02-13
申请人： Mark D. Frank , Jerimy C. Nelson , Karl J. Bois
发明人： Mark D. Frank , Jerimy C. Nelson , Karl J. Bois
IPC分类号： G06F17/50
CPC分类号： G06F17/5036 , H05K1/0237 , H05K1/115 , H05K3/0005
摘要： A computer-implemented method is disclosed for adjusting impedance of a differential via pair in an electrical circuit layout. A differential via pair having an odd mode characteristic impedance needing adjustment is identified in a circuit design database. A region is established around the differential via pair in which circuit elements may be modified to adjust the odd mode characteristic impedance of the differential via pair. At least one of the circuit elements in the electrical circuit layout in the established region is adjusted until the odd mode characteristic impedance is closer to a desired odd mode characteristic impedance value.
摘要翻译：公开了一种用于在电路布局中调整差分通孔对的阻抗的计算机实现的方法。在电路设计数据库中识别具有需要调整的奇模特性阻抗的差分通路对。围绕差分通孔对建立区域，其中电路元件可以被修改以调整差分通孔对的奇模特性阻抗。在建立的区域中的电路布局中的电路元件中的至少一个被调整直到奇数模式特性阻抗更接近期望的奇数模式特性阻抗值。

4. 发明授权

US06859915B1 Signal line impedance verification tool 失效
标题翻译：信号线阻抗检测工具
公开(公告)号：US06859915B1
公开(公告)日：2005-02-22
申请号：US10365848
申请日：2003-02-13
申请人： Mark D. Frank , Jerimy C. Nelson , Karl J. Bois
发明人： Mark D. Frank , Jerimy C. Nelson , Karl J. Bois
IPC分类号： G06F17/50 , H05K1/02 , H05K3/00
CPC分类号： G06F17/5068 , G06F17/5018 , H05K1/0237 , H05K3/0005
摘要： A computer-implemented method for verifying impedance of a signal line in an electrical circuit layout includes reading a desired impedance value for a signal line and identifying the signal line in a circuit design database. A window is established around the signal line in which circuit elements will be included in an impedance calculation for the signal line. The impedance of the signal line is calculated based on the circuit elements inside the window. The signal line is flagged if the calculated impedance differs from the desired impedance value.
摘要翻译：用于验证电路布局中的信号线阻抗的计算机实现方法包括读取信号线的期望阻抗值并识别电路设计数据库中的信号线。在信号线周围建立窗口，其中电路元件将被包括在信号线的阻抗计算中。基于窗口内的电路元件计算信号线的阻抗。如果计算出的阻抗与期望的阻抗值不同，则标记信号线。

5. 发明授权

US06976233B1 Signal via impedance verification tool 失效
标题翻译：信号通过阻抗验证工具
公开(公告)号：US06976233B1
公开(公告)日：2005-12-13
申请号：US10366279
申请日：2003-02-13
申请人： Mark D. Frank , Jerimy C. Nelson , Karl J. Bois
发明人： Mark D. Frank , Jerimy C. Nelson , Karl J. Bois
IPC分类号： G06F17/50
CPC分类号： G06F17/5036 , G06F17/5018
摘要： A computer-implemented method is disclosed for verifying signal via impedance. Properties of a signal via and of any other vias within a given distance of the signal via are read from a circuit design database. A target characteristic impedance value for the signal via is obtained. A characteristic impedance of the signal via is calculated based on the other vias. The signal via is flagged as having an incorrect characteristic impedance if the calculated characteristic impedance does not match the target characteristic impedance value.
摘要翻译：公开了一种用于通过阻抗验证信号的计算机实现的方法。从电路设计数据库读取信号通孔和信号通孔给定距离内的任何其他通孔的属性。获得信号通道的目标特性阻抗值。基于其他通孔计算信号通孔的特性阻抗。如果计算出的特性阻抗与目标特性阻抗值不匹配，则信号通道被标记为具有不正确的特性阻抗。

6. 发明授权

US06968522B1 Differential line pair impedance verification tool 有权
标题翻译：差分线对阻抗验证工具
公开(公告)号：US06968522B1
公开(公告)日：2005-11-22
申请号：US10366134
申请日：2003-02-13
申请人： Mark D. Frank , Jerimy C. Nelson , Karl J. Bois
发明人： Mark D. Frank , Jerimy C. Nelson , Karl J. Bois
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： A computer-implemented method is disclosed for verifying differential line pair impedance. Properties for a differential line pair segment are read from a circuit design database. Properties of neighboring traces are also from the circuit design database, with the neighboring traces being within a given distance of the differential line pair segment. A modal characteristic impedance of the differential line pair segment is calculated based on the neighboring traces. The differential line pair segment is flagged as having an improper impedance value if the calculated modal characteristic impedance differs from a desired modal characteristic impedance.
摘要翻译：公开了一种用于验证差分线路对阻抗的计算机实现的方法。从电路设计数据库中读取差分线对段的属性。相邻迹线的属性也来自电路设计数据库，相邻迹线在差分线对段的给定距离内。基于相邻迹线计算差分线对段的模态特性阻抗。如果计算的模态特性阻抗与期望的模态特性阻抗不同，则将差分线对分段标记为具有不正确的阻抗值。

7. 发明授权

US06983433B1 Differential line pair impedance adjustment tool 有权
标题翻译：差分线对阻抗调整工具
公开(公告)号：US06983433B1
公开(公告)日：2006-01-03
申请号：US10366208
申请日：2003-02-13
申请人： Mark D. Frank , Jerimy C. Nelson , Karl J. Bois
发明人： Mark D. Frank , Jerimy C. Nelson , Karl J. Bois
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： A computer-implemented method is disclosed for adjusting impedance. A list of differential line pairs in a circuit design database is searched through for a target differential line pair, where the target differential line pair is flagged as having an incorrect characteristic impedance. A position in a circuit layout described in said circuit design database of at least one line in the differential line pair is adjusted to correct the characteristic impedance.
摘要翻译：公开了一种用于调整阻抗的计算机实现的方法。搜索电路设计数据库中的差分线对的列表，用于目标差分线对，其中目标差分线对被标记为具有不正确的特性阻抗。调整在差分线路对中的至少一条线路的所述电路设计数据库中描述的电路布局中的位置，以校正特性阻抗。

8. 发明授权

US06845492B1 Signal via impedance adjustment tool 失效
标题翻译：信号通过阻抗调整工具
公开(公告)号：US06845492B1
公开(公告)日：2005-01-18
申请号：US10365831
申请日：2003-02-13
申请人： Mark D. Frank , Jerimy C. Nelson , Karl J. Bois
发明人： Mark D. Frank , Jerimy C. Nelson , Karl J. Bois
IPC分类号： G06F17/50 , H05K1/02 , H05K1/11 , H05K3/00
CPC分类号： G06F17/5068 , G06F17/5018 , H05K1/0237 , H05K1/115 , H05K3/0005 , H05K2201/09236
摘要： A computer-implemented method for adjusting signal via impedance includes identifying a signal via in a circuit design database. The signal via is flagged as having an impedance error. A window is established around the signal via, with the window lying on a single layer. Only vias in the window may be adjusted to minimize the impedance error. At least one via in the window is adjusted to minimize said impedance error.
摘要翻译：用于通过阻抗调整信号的计算机实现的方法包括在电路设计数据库中识别信号通路。信号通道被标记为具有阻抗误差。围绕信号通道建立窗口，窗口位于单层上。可以调整窗口中的通孔以最小化阻抗误差。调整窗口中的至少一个通孔以最小化所述阻抗误差。

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