专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06803612B2 Integrated circuit having electrical connecting elements 失效
标题翻译：具有电连接元件的集成电路
公开(公告)号：US06803612B2
公开(公告)日：2004-10-12
申请号：US10662795
申请日：2003-09-15
申请人： Matthias Uwe Lehr , Jens Möckel , Dirk Többen
发明人： Matthias Uwe Lehr , Jens Möckel , Dirk Többen
IPC分类号： H01L2973
CPC分类号： H01L23/5256 , H01L23/525 , H01L23/528 , H01L2924/0002 , H01L2924/00
摘要： On a substrate, first and second electrical connecting elements of an integrated circuit are disposed next to one another along a first direction. The first electrical connecting element is at a first distance from the second electrical connecting element. First and interconnects are disposed on the substrate, the first interconnect being connected to the first electrical connecting element and the second interconnect being connected to the second electrical connecting element. Third and fourth electrical connecting elements are disposed on the substrate and the first and second interconnects are disposed between the third and fourth electrical connecting elements and therebetween are at a second distance from one another, the second distance being smaller than the first distance.
摘要翻译：在基板上，集成电路的第一和第二电连接元件沿着第一方向彼此相邻设置。第一电连接元件与第二电连接元件处于第一距离。第一和互连设置在基板上，第一互连件连接到第一电连接元件，第二互连件连接到第二电连接元件。第三和第四电连接元件设置在基板上，并且第一和第二互连件设置在第三和第四电连接元件之间，并且其间彼此相距第二距离，第二距离小于第一距离。

2. 发明授权

US06773934B2 Method for releasable contact-connection of a plurality of integrated semiconductor modules on a wafer 有权
标题翻译：多个集成半导体模块在晶片上可释放地接触连接的方法
公开(公告)号：US06773934B2
公开(公告)日：2004-08-10
申请号：US10105590
申请日：2002-03-25
申请人： Jens Möckel , Gerrit Färber , Martin Fritz , Frank Weber , Michael Hübner
发明人： Jens Möckel , Gerrit Färber , Martin Fritz , Frank Weber , Michael Hübner
IPC分类号： H01L2166
CPC分类号： G01R31/043 , G01R1/06794 , G01R31/2886 , G01R31/312
摘要： A method for releasable contact-connection of a plurality of integrated semiconductor modules on a wafer, each of which having a plurality of interconnected supply voltage terminals, includes the steps of providing a contacting card for applying external electrical signals to the semiconductor modules with contact elements for releasable electrical connection to terminal pads of the semiconductor modules, aligning the contacting card with the wafer, producing a releasable contact between terminal pads of the plurality of semiconductor modules and the contact elements of the contacting card, checking the contact quality for each of the semiconductor modules by applying a voltage to at least one of the supply voltage terminals of the semiconductor module through the contacting card, measuring the voltage present at a further one of the supply voltage terminals through the contacting card, and using the measurement result to assess whether or not the semiconductor module has correct contact.
摘要翻译：一种用于在晶片上的多个集成半导体模块的可释放接触连接的方法，每个半导体模块具有多个互连的电源电压端子，包括以下步骤：提供接触卡，用于将外部电信号施加到具有接触元件的半导体模块为了可释放地连接到半导体模块的端子焊盘，将接触卡与晶片对准，在多个半导体模块的端子焊盘和接触卡的接触元件之间产生可释放的接触，检查每个半导体模块的接触质量半导体模块，通过接触卡将电压施加到半导体模块的至少一个电源电压端子，通过接触卡测量另一个电源电压端子上存在的电压，并使用测量结果来评估是否或者不是半导体模块具有正确的含义 ct。

3. 发明授权

US07064809B2 Apparatus and method for processing wafers 失效
标题翻译：用于处理晶片的装置和方法
公开(公告)号：US07064809B2
公开(公告)日：2006-06-20
申请号：US11045481
申请日：2005-01-31
申请人： Franz Kemper , Jens Möckel
发明人： Franz Kemper , Jens Möckel
IPC分类号： G03B27/32 , G03B27/58
CPC分类号： H01L21/68
摘要： An apparatus for processing semiconductor wafers includes: a wafer support with a first positioning system that can rotate the wafer support coaxially with a wafer; at least one processing apparatus, which can be moved with a second positioning system such that a processing tool proceeding from the processing apparatus can be guided radially over the wafer; and at least one position determining apparatus for determining a wafer position on the basis of features of the wafer. Alignment marks of the wafer are found and points to be processed, such as laser fuses, are moved by rotation of the wafer and movement of at least one processing apparatus in the radial direction above the wafer.
摘要翻译：一种用于处理半导体晶片的设备包括：具有可与晶片同轴旋转晶片支架的第一定位系统的晶片支架; 至少一个处理装置，其可以用第二定位系统移动，使得从处理装置进行的处理工具可以在晶片上径向引导; 以及至少一个位置确定装置，用于基于晶片的特征来确定晶片位置。发现晶片的对准标记，并且要处理的点，例如激光熔丝，通过晶片的旋转和至少一个处理设备在晶片上方的径向移动而移动。

4. 发明授权

US06917214B2 Method for testing a plurality of devices disposed on a wafer and connected by a common data line 失效
标题翻译：用于测试设置在晶片上并通过公共数据线连接的多个器件的方法
公开(公告)号：US06917214B2
公开(公告)日：2005-07-12
申请号：US10278227
申请日：2002-10-23
申请人： Gerrit Farber , Martin Fritz , Jens Möckel
发明人： Gerrit Farber , Martin Fritz , Jens Möckel
IPC分类号： G11C29/00 , G11C29/44 , H01L21/66 , G01R31/26
CPC分类号： H01L22/20 , G11C29/006 , G11C29/44 , H01L2924/0002 , H01L2924/00
摘要： In a method for testing a plurality of devices, which are arranged on a wafer and connected to a common data line, wherein the devices are connectable to a test unit via the common data line, a connection is separated first between a defective device and the common data line, or an internal connection in the defective device is separated. Subsequently, the remaining devices are tested. Alternatively, instead of the connection between the defective device and the common data line, the connection between a defective device and a common or an individual supply line is separated.
摘要翻译：在用于测试布置在晶片上并连接到公共数据线的多个器件的方法中，其中所述器件经由公共数据线可连接到测试单元，首先在缺陷器件和公共数据线或有缺陷的设备中的内部连接被分离。随后，对其余的设备进行测试。或者，代替有缺陷的设备和公共数据线之间的连接，有缺陷的设备与公共或单独的供电线路之间的连接被分离。

5. 发明授权

US06302729B2 Integrated circuit with electrical connection points that can be severed by the action of energy 有权
标题翻译：具有电连接点的集成电路，可以通过能量的作用而被切断
公开(公告)号：US06302729B2
公开(公告)日：2001-10-16
申请号：US09776954
申请日：2001-02-05
申请人： Jens Möckel , Robert Feurle
发明人： Jens Möckel , Robert Feurle
IPC分类号： H01R2700
CPC分类号： H01L23/5256 , H01L23/5258 , H01L2924/0002 , H01L2924/00
摘要： An integrated circuit includes electrical conductor tracks adjacently disposed parallel to one another and running substantially in a first direction. The tracks have at least three electrical connection points that can be severed by energy. The connection points are offset with respect to one another both in the first direction and in a second direction at right angles thereto. A central connection point is disposed between two outer connection points viewed in both directions. The connection points are a constituent part of a central or of an outer conductor track. The central and outer tracks are disposed parallel to one another and run substantially in the first direction. Each outer conductor track has, at the level of the central connection point, an offset facing away from the latter and, at the level of the outer connection point of the respective other outer conductor track, an offset facing the latter. The central conductor track has, at the level of the two outer connection points, a respective offset facing away from the latter.
摘要翻译：集成电路包括彼此平行布置且基本上沿第一方向运行的电导体轨迹。轨道具有至少三个可被能量切断的电连接点。连接点在第一方向和与其成直角的第二方向上相对于彼此偏移。中心连接点设置在从两个方向观察的两个外部连接点之间。连接点是中心或外部导体轨道的组成部分。中心和外轨道彼此平行地设置并基本上在第一方向上运行。每个外部导体轨道在中心连接点的水平处具有一个偏离后者的偏移，并且在相应的另一个外部导体轨道的外部连接点的水平处具有面向其的偏移。在两个外部连接点的水平处，中心导体轨道具有相对于后者的相应偏移。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式