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1. 发明授权

US5267190A Simultaneous search-write content addressable memory 失效
标题翻译：同时搜索 - 写入内容可寻址内存
公开(公告)号：US5267190A
公开(公告)日：1993-11-30
申请号：US24329
申请日：1993-04-28
申请人： Jeffery L. Easley , Ronald M. Christiansen , David C. Lee , Ashgar K. Malik , John F. Agrusa
发明人： Jeffery L. Easley , Ronald M. Christiansen , David C. Lee , Ashgar K. Malik , John F. Agrusa
IPC分类号： G11C15/04 , G11C15/00
CPC分类号： G11C15/04
摘要： An improved content addressable memory includes a control circuit which, during a single clock pulse, receives and compares one search address on search address input terminals to compare addresses in N address registers, and simultaneously the control circuit conditionally writes a previously received search address into a selectable one of N address registers. With this improvement, the operating speed of the content addressable memory is increased since the writing of one search address into an address register and the searching with another search address does not require two separate clock cycles.
摘要翻译：改进的内容可寻址存储器包括控制电路，其在单个时钟脉冲期间接收并比较搜索地址输入端上的一个搜索地址以比较N个地址寄存器中的地址，并且同时控制电路有条件地将先前接收的搜索地址写入可选择N个地址寄存器之一。通过这种改进，由于将一个搜索地址写入地址寄存器并且用另一个搜索地址的搜索不需要两个单独的时钟周期，所以内容可寻址存储器的操作速度增加。

2. 发明授权

US5226005A Dual ported content addressable memory cell and array 失效
标题翻译：双重内容可寻址存储器单元和阵列
公开(公告)号：US5226005A
公开(公告)日：1993-07-06
申请号：US615941
申请日：1990-11-19
申请人： David C. Lee , Jeffery L. Easley , Ashgar K. Malik
发明人： David C. Lee , Jeffery L. Easley , Ashgar K. Malik
IPC分类号： G11C15/04
CPC分类号： G11C15/04 , G11C8/16
摘要： An improved CAM (content addressable memory) cell is provided with dual address lines operable independently for a Read operation or for a Write operation. The cell is additionally provided with dual ports so that the first port permits a data input for Write operations or alternatively a data input for Search-Compare operations. The second port (Data Output) is independently connected to enable Read out of data residing in the cell. Each CAM cell also has a coincidence line (match-hit) output to indicate when an input Search bit or word coincides with resident data within the CAM cell. The CAM cells are arranged in an array of "m" rows with each row having "n" bits to hold a "n" bit word. Operationally the array permits both "Read" and "Search-Compare" operations to be accomplished in one clock cycle rather than the usual requirement of 3-4 clock cycles.
摘要翻译：改进的CAM（内容可寻址存储器）单元被提供有独立用于读操作或写操作的双地址线。该单元另外设置有双端口，使得第一端口允许用于写操作的数据输入或者用于搜索比较操作的数据输入。第二个端口（数据输出）是独立连接的，可以读取存储在单元格中的数据。每个CAM单元还具有一致符号（匹配命中）输出，以指示何时输入的搜索位或字与CAM单元内的驻留数据一致。 CAM单元被布置成“m”行的阵列，每行具有“n”位以保持“n”位字。在操作上，阵列允许在一个时钟周期内完成“读取”和“搜索比较”操作，而不是3-4个时钟周期的通常要求。

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