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1. 发明授权

US06910212B2 System and method for improved complex storage locks 失效
标题翻译：改进复杂存储锁的系统和方法
公开(公告)号：US06910212B2
公开(公告)日：2005-06-21
申请号：US09729894
申请日：2000-12-04
申请人： Larry Bert Brenner , Bimal Kiran Doshi , Greg Robert Mewhinney , James William Van Fleet
发明人： Larry Bert Brenner , Bimal Kiran Doshi , Greg Robert Mewhinney , James William Van Fleet
IPC分类号： G06F9/00 , G06F9/46 , G06F9/54 , G06F15/163
CPC分类号： G06F9/526 , G06F2209/523 , Y10S707/99933 , Y10S707/99938 , Y10S707/99939
摘要： An improved system and method for improving complex storage locks that manage access to a shared resource. A FIFO queue is maintained for processes waiting to read or write to the shared resource. When the shared resource is available, the first item is read from the queue. If the first item is a write requestor, the requestor is woken up in order to request the lock. If the first item on the queue is a read requestor, then that read requestor is woken up along with any other read requestors read from the queue until a write requestor is encountered or the end of the queue is reached. When the write wanted flag is set, new read requestors are denied access to the read lock, however any read requestors that were woken up in order to use the read lock are granted a read lock.
摘要翻译：改进的系统和方法，用于改进管理对共享资源的访问的复杂存储锁。为等待读取或写入共享资源的进程维护FIFO队列。当共享资源可用时，从队列中读取第一个项目。如果第一个项目是写请求者，则请求者被唤醒以请求锁定。如果队列中的第一个项目是读取请求者，那么该读取请求程序将与从队列中读取的任何其他读取请求程序一起被唤醒，直到遇到写入请求程序或达到队列的结尾。当写入想要的标志被设置时，新的读取请求者被拒绝访问读取锁定，但是为了使用读取锁而被唤醒的任何读取请求者被授予读取锁定。

2. 发明授权

US5758168A Interrupt vectoring for optionally architected facilities in computer systems 失效
标题翻译：用于计算机系统中可选设计的设施的中断向量
公开(公告)号：US5758168A
公开(公告)日：1998-05-26
申请号：US634468
申请日：1996-04-18
申请人： Bruce Gerard Mealey , James William Van Fleet , Michael Stephen Williams
发明人： Bruce Gerard Mealey , James William Van Fleet , Michael Stephen Williams
IPC分类号： G06F9/48 , G06F11/34 , G06F9/46
CPC分类号： G06F9/4812 , G06F11/3466
摘要： An exception handler for a computer system, particularly for performance monitoring facilities, employs implementation-dependent steps executed from a kernel extension which is more application-level than kernel level. The implementation-independent kernel is involved only at very minimum level for a prologue to the exception handling routine. First a kernel extension registers an exception with the processor by storing the address of a pointer to a first-level interrupt handler; this address is stored in a location in kernel data storage, in non-paged memory. When an exception condition is reached, state is saved and the address location is checked to see if an exception has been registered. If so, the address is used to go to the first-level interrupt handler, which is at the kernel extension level. The first-level interrupt handler may access a second-level interrupt handler. Only the code which is used to save state and check to see if an exception is registered is in the kernel, and this part of the exception handling code is implementation-independent. i.e., the same for all implementations of this processor architecture.
摘要翻译：计算机系统的异常处理程序，特别是性能监视工具的异常处理程序，采用从内核扩展执行的实现相关步骤，该内核扩展程序的应用程序级别高于内核级别。独立于实现的内核仅在非常低的级别涉及异常处理例程的序言。首先，内核扩展通过将指针的地址存储到第一级中断处理程序来向处理器注册异常; 该地址存储在内核数据存储中的位置，在非分页存储器中。当达到异常条件时，保存状态并检查地址位置以查看是否已经注册了异常。如果是这样，那么这个地址就被用来到内核扩展级的第一级中断处理程序。第一级中断处理程序可以访问第二级中断处理程序。只有用于保存状态并检查异常是否被注册的代码在内核中，而这部分异常处理代码是独立于实现的。即对于该处理器架构的所有实现都是相同的。

3. 发明授权

US07620661B2 Method for improving the performance of database loggers using agent coordination 有权
标题翻译：使用代理协调来提高数据库记录器性能的方法
公开(公告)号：US07620661B2
公开(公告)日：2009-11-17
申请号：US11260623
申请日：2005-10-27
申请人： David William Mehaffy , James William Van Fleet
发明人： David William Mehaffy , James William Van Fleet
IPC分类号： G08F12/00 , G06F17/30
CPC分类号： G06F17/30368 , Y10S707/99953
摘要： A method for substantially reducing the latency of the database (DB) logging process by removing the agent notification requirement from the DB logger and allowing the DB logger to proceed to the next commit process without the latency of providing each waiting agent a notification that the agent continue their respective processes. When an agent commits a change to persistent storage of the database, the request is received by the logger, which performs the update to the persistent storage. A list of agents waiting on the completion of the commit process is compiled by the logger. The list of agents is provided to and provided to the next committing agent. The next committing agent then notifies the waiting agents that they are able to proceed with their respective processing. The logger may immediately perform the next update to persistent memory without utilizing a substantial amount of time notifying the waiting agents.
摘要翻译：一种通过从DB记录器中删除代理通知要求并允许DB记录器继续进行下一个提交进程而大大减少数据库（DB）日志记录进程的延迟的方法，而不会为每个等待代理提供通知代理继续各自的进程。当代理人对数据库的持久存储进行更改时，该记录器将接收该请求，该记录器将执行对持久存储的更新。在完成提交进程时等待的代理程序列表由记录器编译。代理列表提供给并提供给下一个提交代理。然后下一个提交代理通知等待代理人他们能够进行各自的处理。记录器可以立即对持久存储器执行下一次更新，而不用大量时间通知等待代理。

4. 发明授权

US07318220B2 System and method for measuring latch contention 失效
标题翻译：用于测量闩锁争用的系统和方法
公开(公告)号：US07318220B2
公开(公告)日：2008-01-08
申请号：US10798905
申请日：2004-03-11
申请人： David William Mehaffy , James William Van Fleet
发明人： David William Mehaffy , James William Van Fleet
IPC分类号： G06F9/44
CPC分类号： G06F9/526 , Y10S707/99938
摘要： A system and method is provided for measuring lock usage in a non-intrusive manner. Measurements are performed only when a lock is contended. When a lock is requested and the lock is available (i.e., is not contended), the only data gathered is a counter that is incremented to keep track of the number of times the particular lock was requested. When a lock is contended, an operating system trace hook is requested. The trace hook records data such as the timestamp that the requestor requested the lock, the request count, a stack traceback to identify the function corresponding to the requestor, and the address of the lock that was requested. Post-operative processing analyzes the recorded trace hook data to identify contended locks and processes that may not be efficiently using locks.
摘要翻译：提供了一种用于以非侵入方式测量锁使用的系统和方法。仅当锁定时才进行测量。当请求锁并且锁可用时（即不竞争），所收集的唯一数据是递增的计数器以跟踪特定锁被请求的次数。当有争议时，需要一个操作系统跟踪钩。跟踪钩子记录诸如请求者请求锁定的时间戳，请求计数，用于标识与请求者相对应的功能的堆栈追溯以及所请求的锁的地址的数据。手术后处理分析记录的跟踪钩数据，以识别可能无法有效使用锁的竞争锁和进程。

5. 发明授权

US5961583A Method and system for using the event wait list anchor as a lock for events 失效
标题翻译：使用事件等待列表锚作为事件锁的方法和系统
公开(公告)号：US5961583A
公开(公告)日：1999-10-05
申请号：US755274
申请日：1996-11-22
申请人： James William Van Fleet
发明人： James William Van Fleet
IPC分类号： G06F9/46 , G06F9/52 , G06F9/00
CPC分类号： G06F9/52
摘要： A method and apparatus for maintaining a list for threads which are awaiting their occurrence of event. First a thread is detected that desires to perform some type of action based upon the occurrence of an event. Thereafter, the value of an event list anchor is set to indicate that it is currently unavailable. Thereafter, the value of the event list anchor set equal to the identification of the second thread.
摘要翻译：一种用于维护正在等待事件发生的线程的列表的方法和装置。首先，检测到一个线程需要基于事件的发生来执行某种类型的动作。此后，事件列表锚点的值被设置为指示它当前不可用。此后，事件列表锚点的值等于第二个线程的标识。

6. 发明授权

US5790846A Interrupt vectoring for instruction address breakpoint facility in computer systems 失效
标题翻译：计算机系统中指令地址断点设备的中断向量
公开(公告)号：US5790846A
公开(公告)日：1998-08-04
申请号：US634712
申请日：1996-04-18
申请人： Bruce Gerard Mealey , James William Van Fleet , Michael Stephen Williams
发明人： Bruce Gerard Mealey , James William Van Fleet , Michael Stephen Williams
IPC分类号： G06F9/48 , G06F11/34 , G06F9/46
CPC分类号： G06F9/4812 , G06F11/3466
摘要： An exception handler for a computer system, particularly for performance monitoring facilities, employs implementation-dependent steps executed from a kernel extension which is more application-level than kernel level. The implementation-independent kernel is involved only at very minimum level for a prologue to the exception handling routine. First, a kernel extension registers an exception with the processor by storing the address of a pointer to a first-level interrupt handler; this address is stored in a location in kernel data storage, in non-paged memory. When an exception condition is reached, state is saved and the address location is checked to see if an exception has been registered. If so, the address is used to go to the first-level interrupt handler, which is at the kernel extension level. The first-level interrupt handler may access a second-level interrupt handler. Only the code which is used to save state and check to see if an exception is registered is in the kernel, and this part of the exception handling code is implementation-independent. i.e., the same for all implementations of this processor architecture.
摘要翻译：计算机系统的异常处理程序，特别是性能监视工具的异常处理程序，采用从内核扩展执行的实现相关步骤，该内核扩展程序的应用程序级别高于内核级别。独立于实现的内核仅在非常低的级别涉及异常处理例程的序言。首先，内核扩展通过将指针的地址存储到第一级中断处理程序来向处理器注册异常; 该地址存储在内核数据存储中的位置，在非分页存储器中。当达到异常条件时，保存状态并检查地址位置以查看是否已经注册了异常。如果是这样，那么这个地址就被用来到内核扩展级的第一级中断处理程序。第一级中断处理程序可以访问第二级中断处理程序。只有用于保存状态并检查异常是否被注册的代码在内核中，而这部分异常处理代码是独立于实现的。即对于该处理器架构的所有实现都是相同的。

7. 发明授权

US5873116A Method and apparatus for controlling access to data structures without the use of locks 失效
标题翻译：用于在不使用锁的情况下控制对数据结构的访问的方法和装置
公开(公告)号：US5873116A
公开(公告)日：1999-02-16
申请号：US754352
申请日：1996-11-22
申请人： James William Van Fleet
发明人： James William Van Fleet
IPC分类号： G06F9/46 , G06F12/00 , G06F7/00
CPC分类号： G06F9/52 , Y10S707/99938
摘要： A method and system for altering data contained in a structure without requiring a lock to the structure itself. The method and apparatus retrieve a pointer to the structure from a location responsible for maintaining a pointer to the structure. The structure has a reference count for indicating processes that are currently using the data residing within the structure itself. The reference count is then atomically incremented and a new structure is obtained. The data contained in the structure, to be altered, is then copied to the new structure. The new structure also has a reference count for indicating processes that are currently using the data residing in the new structure. The reference count of the new structure is then set to indicate that a single process is accessing the new structure. Thereafter, the pointer in the responsible location for the structure, to be altered, is atomically replaced with a pointer to the new structure. The reference count of the new structure is then set to indicate that the single process is no longer accessing the new structure.
摘要翻译：用于改变包含在结构中的数据而不需要对结构本身的锁定的方法和系统。该方法和装置从负责维护指向结构的指针的位置检索到结构的指针。该结构具有用于指示正在使用驻留在结构本身内的数据的进程的引用计数。引用计数然后被原子地递增，并获得一个新的结构。然后将要更改的结构中包含的数据复制到新结构中。新结构还具有用于指示正在使用驻留在新结构中的数据的进程的引用计数。然后将新结构的引用计数设置为指示单个进程正在访问新结构。此后，要更改的结构的负责位置中的指针将被替换为指向新结构的指针。然后将新结构的引用计数设置为指示单个进程不再访问新结构。

8. 发明授权

US5764884A Method and apparatus for improved instruction counting schemes 失效
标题翻译：改进指令计数方案和方法
公开(公告)号：US5764884A
公开(公告)日：1998-06-09
申请号：US741734
申请日：1996-10-31
申请人： James William Van Fleet
发明人： James William Van Fleet
IPC分类号： G06F11/34 , G06F11/36 , G06F11/28
CPC分类号： G06F11/3612 , G06F11/3466 , G06F11/3648 , G06F2201/865 , G06F2201/88
摘要： A method and apparatus for monitoring the execution of a procedure having multiple exit points without modifying the software via breakpoints. The starting address of the procedure is loaded into an Instruction Address Break Register (IABR). Upon execution of the starting address the IABR raises an exception. The processing of the exception is used to implement a counting routine and for loading the IABR with the address of the calling party via the Link Register. Upon execution of the address of the calling party, the IABR once again raises an exception. The processing of the second exception is used for stopping the counter and performing any related analysis.
摘要翻译：一种用于监视具有多个出口点的过程的执行而不通过断点修改软件的方法和装置。程序的起始地址被加载到指令地址中断寄存器（IABR）中。执行起始地址后，IABR引发异常。异常的处理用于实现计数程序，并通过链路寄存器将IABR与主叫方的地址进行加载。在执行主叫方的地址后，IABR再次提出异常。第二个异常的处理用于停止计数器并执行任何相关的分析。

9. 发明授权

US08010948B2 System and method for measuring latch contention 失效
标题翻译：用于测量闩锁争用的系统和方法
公开(公告)号：US08010948B2
公开(公告)日：2011-08-30
申请号：US11935371
申请日：2007-11-05
申请人： David William Mehaffy , James William Van Fleet
发明人： David William Mehaffy , James William Van Fleet
IPC分类号： G06F9/44
CPC分类号： G06F9/526 , Y10S707/99938
摘要： A system and method is provided for measuring lock usage in a non-intrusive manner. Measurements are performed only when a lock is contended. When a lock is requested and the lock is available (i.e., is not contended), the only data gathered is a counter that is incremented to keep track of the number of times the particular lock was requested. When a lock is contended, an operating system trace hook is requested. The trace hook records data such as the timestamp that the requester requested the lock, the request count, a stack traceback to identify the function corresponding to the requester, and the address of the lock that was requested. Post-operative processing analyzes the recorded trace hook data to identify contended locks and processes that may not be efficiently using locks.
摘要翻译：提供了一种用于以非侵入方式测量锁使用的系统和方法。仅当锁定时才进行测量。当请求锁并且锁可用时（即不竞争），所收集的唯一数据是递增的计数器以跟踪特定锁被请求的次数。当有争议时，需要一个操作系统跟踪钩。跟踪钩子记录数据，例如请求者请求锁定的时间戳，请求计数，用于标识与请求者相对应的功能的堆栈追溯以及所请求的锁的地址。手术后处理分析记录的跟踪钩数据，以识别可能无法有效使用锁的竞争锁和进程。

10. 发明授权

US5963737A Interupt vectoring for trace exception facility in computer systems 失效
标题翻译：计算机系统中的跟踪异常设备的中断向量
公开(公告)号：US5963737A
公开(公告)日：1999-10-05
申请号：US634467
申请日：1996-04-18
申请人： Bruce Gerard Mealey , James William Van Fleet , Michael Stephen Williams
发明人： Bruce Gerard Mealey , James William Van Fleet , Michael Stephen Williams
IPC分类号： G06F9/32 , G06F11/34 , G06F9/00
CPC分类号： G06F9/32 , G06F11/3466
摘要： An exception handler for a computer system, particularly for performance monitoring facilities, employs implementation-dependent steps executed from a kernel extension which is more application level than kernel level. The implementation-independent kernel is involved only at very minimum level for a prologue to the exception handling routine. First a kernel extension registers an exception with the processor by storing the address of a pointer to a first-level interrupt handler; this address is stored in a location in kernel data storage, in non-paged memory. When an exception condition is reached, state is saved and the address location is checked to see if an exception has been registered. If so, the address is used to go to the first-level interrupt handler, which is at the kernel extension level. The first-level interrupt handler may access a second-level interrupt handler. Only the code which is used to save state and check to see if an exception is registered is in the kernel, and this part of the exception handling code is implementation-independent. i.e., the same for all implementations of this processor architecture.
摘要翻译：计算机系统的异常处理程序，特别是性能监视工具的异常处理程序，采用从内核扩展执行的实现相关步骤，该内核扩展程序的应用级别高于内核级别。独立于实现的内核仅在非常低的级别涉及异常处理例程的序言。首先，内核扩展通过将指针的地址存储到第一级中断处理程序来向处理器注册异常; 该地址存储在内核数据存储中的位置，在非分页存储器中。当达到异常条件时，保存状态并检查地址位置以查看是否已经注册了异常。如果是这样，那么这个地址就被用来到内核扩展级的第一级中断处理程序。第一级中断处理程序可以访问第二级中断处理程序。只有用于保存状态并检查异常是否被注册的代码在内核中，而这部分异常处理代码是独立于实现的。即对于该处理器架构的所有实现都是相同的。

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