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1. 发明申请

US20110166430A1 SYSTEM AND METHODS FOR ANALYZING SEIZURE ACTIVITY 审中-公开
标题翻译：分析活动的系统和方法
公开(公告)号：US20110166430A1
公开(公告)日：2011-07-07
申请号：US13050839
申请日：2011-03-17
申请人： John F. Harris , Kent W. Leyde , Jaideep Mavoori
发明人： John F. Harris , Kent W. Leyde , Jaideep Mavoori
IPC分类号： A61B5/04 , A61B5/0476
CPC分类号： A61N1/37229 , A61B5/0031 , A61B5/0476 , A61B5/4094 , A61B2560/0214 , A61N1/36064
摘要： The present invention provides systems and methods for ambulatory, long term monitoring of a physiological signal from a patient. At least a portion of the systems of the present invention may be implanted within the patient in a minimally invasive manner. In preferred embodiments, brain activity signals are sampled from the patient and are transmitted to a handheld patient communication device for further processing.
摘要翻译：本发明提供了用于从患者进行生理信号的长期监测的系统和方法。本发明的系统的至少一部分可以以微创方式植入患者体内。在优选实施例中，从患者采样脑活动信号，并将其发送到手持式病人通信装置以进一步处理。

2. 发明申请

US20080033502A1 Minimally Invasive System for Selecting Patient-Specific Therapy Parameters 有权
标题翻译：用于选择患者特异性治疗参数的微创系统
公开(公告)号：US20080033502A1
公开(公告)日：2008-02-07
申请号：US11766760
申请日：2007-06-21
申请人： John Harris , Kent Leyde , Jaideep Mavoori
发明人： John Harris , Kent Leyde , Jaideep Mavoori
IPC分类号： A61N1/00 , A61B5/0476
CPC分类号： A61N1/37229 , A61B5/0031 , A61B5/0476 , A61B5/4094 , A61B2560/0214 , A61N1/36064
摘要： The present invention provides systems and methods for ambulatory, long term monitoring of a physiological signal from a patient. At least a portion of the systems of the present invention may be implanted within the patient in a minimally invasive manner. In preferred embodiments, brain activity signals are sampled from the patient and are transmitted to a handheld patient communication device for further processing.
摘要翻译：本发明提供了用于从患者进行生理信号的长期监测的系统和方法。本发明的系统的至少一部分可以以微创方式植入患者体内。在优选实施例中，从患者采样脑活动信号，并将其发送到手持式病人通信装置以进一步处理。

3. 发明申请

US20110298051A1 Electrostatic Discharge Management Apparatus, Systems, and Methods 有权
标题翻译：静电放电管理装置，系统和方法
公开(公告)号：US20110298051A1
公开(公告)日：2011-12-08
申请号：US13214044
申请日：2011-08-19
申请人： Cong Khieu , Yanjun Ma , Jaideep Mavoori
发明人： Cong Khieu , Yanjun Ma , Jaideep Mavoori
IPC分类号： H01L27/06 , H01L29/778
CPC分类号： H01L27/0251
摘要： Apparatus, systems, and methods may include managing electrostatic discharge events by using a semiconductor device having a non-aligned gate to implement a snap-back voltage protection mechanism. Such devices may be formed by doping a semiconductor substrate to form a first conductive region as a well, forming one of a source region and a drain region in the well, depositing a layer of polysilicon on the substrate to establish a gating area that does not overlap the one of the source region and the drain region, and forming an integrated circuit supported by the substrate to couple to the one of the source region and the drain region to provide snap-back voltage operation at a node between the integrated circuit and the source or drain region. Additional apparatus, systems, and methods are disclosed.
摘要翻译：装置，系统和方法可以包括通过使用具有非对准栅极的半导体器件来管理静电放电事件以实现快速反向电压保护机制。这样的器件可以通过掺杂半导体衬底以形成阱中的第一导电区域形成，形成阱中的源极区域和漏极区域之一，在衬底上沉积多晶硅层以建立栅极区域与源极区域和漏极区域中的一个重叠，并且形成由衬底支撑的集成电路以耦合到源极区域和漏极区域中的一个，以在集成电路和漏极区域之间的节点处提供快速恢复电压操作源极或漏极区。公开了附加装置，系统和方法。

4. 发明授权

US08022498B1 Electrostatic discharge management apparatus, systems, and methods 有权
标题翻译：静电放电管理装置，系统和方法
公开(公告)号：US08022498B1
公开(公告)日：2011-09-20
申请号：US11837810
申请日：2007-08-13
申请人： Cong Khieu , Yanjun Ma , Jaideep Mavoori
发明人： Cong Khieu , Yanjun Ma , Jaideep Mavoori
IPC分类号： H01L29/00
CPC分类号： H01L27/0251
摘要： Apparatus, systems, and methods may include managing electrostatic discharge events by using a semiconductor device having a non-aligned gate to implement a snap-back voltage protection mechanism. Such devices may be formed by doping a semiconductor substrate to form a first conductive region as a well, forming one of a source region and a drain region in the well, depositing a layer of polysilicon on the substrate to establish a gating area that does not overlap the one of the source region and the drain region, and forming an integrated circuit supported by the substrate to couple to the one of the source region and the drain region to provide snap-back voltage operation at a node between the integrated circuit and the source or drain region. Additional apparatus, systems, and methods are disclosed.
摘要翻译：装置，系统和方法可以包括通过使用具有非对准栅极的半导体器件来管理静电放电事件以实现快速反向电压保护机制。这样的器件可以通过掺杂半导体衬底以形成阱中的第一导电区域形成，形成阱中的源极区域和漏极区域之一，在衬底上沉积多晶硅层以建立栅极区域与源极区域和漏极区域中的一个重叠，并且形成由衬底支撑的集成电路以耦合到源极区域和漏极区域中的一个，以在集成电路和漏极区域之间的节点处提供快速恢复电压操作源极或漏极区。公开了附加装置，系统和方法。

5. 发明申请

US20110169530A1 CIRCUIT FOR CLASSIFYING SIGNALS 审中-公开
标题翻译：分类信号电路
公开(公告)号：US20110169530A1
公开(公告)日：2011-07-14
申请号：US12247098
申请日：2008-10-07
申请人： Jaideep Mavoori , Chris Diorio
发明人： Jaideep Mavoori , Chris Diorio
IPC分类号： H03K5/22
CPC分类号： H03F1/0277 , H03F3/68
摘要： A circuit for classification of analog input signals, comprising an analog memory component, such as a floating gate, used to store a threshold value; a threshold detection module used to determine whether the analog input signal exceeds the threshold value; a time delay module used to delay a processing of the analog signal; a time-amplitude window calculation module used to determine whether an amplitude of the analog input signal is between a lower limit and an upper limit of an amplitude window; and an output module indicating whether the amplitude of the analog signal is between the lower and the upper limit, wherein the indication is used to determine whether the analog input signal belongs to one of a plurality of analog signal classes. The classification is implemented in the analog domain, eliminating the need for sampling and digitizing the analog signal, consequently minimizing circuit area and power.
摘要翻译：一种用于模拟输入信号分类的电路，包括用于存储阈值的诸如浮动栅极的模拟存储器组件; 用于确定模拟输入信号是否超过阈值的阈值检测模块; 用于延迟模拟信号的处理的延时模块; 时间幅度窗口计算模块，用于确定模拟输入信号的振幅是否在幅度窗口的下限和下限之间; 以及输出模块，其指示模拟信号的幅度是否在下限和上限之间，其中，所述指示用于确定模拟输入信号是否属于多个模拟信号类别中的一个。分类在模拟域中实现，不需要对模拟信号进行采样和数字化，从而最小化电路面积和功率。

6. 发明授权

US07732887B2 Schottky junction diode devices in CMOS 有权
标题翻译： CMOS中的肖特基结二极管器件
公开(公告)号：US07732887B2
公开(公告)日：2010-06-08
申请号：US11387603
申请日：2006-03-22
申请人： Yanjun Ma , Ronald A. Oliver , Todd E. Humes , Jaideep Mavoori
发明人： Yanjun Ma , Ronald A. Oliver , Todd E. Humes , Jaideep Mavoori
IPC分类号： H01L31/07
CPC分类号： H01L29/872 , H01L27/0629 , H01L27/0814 , H01L29/66143
摘要： A Schottky junction diode device having improved performance is fabricated in a conventional CMOS process. A substrate including a material doped to a first conductivity type is formed. A first well is disposed over the substrate. The first well includes a material doped to a second conductivity type opposite that of the first conductivity type. A region of metal-containing material is disposed over the first well to form a Schottky junction at an interface between the region of metal-containing material and the first well. In one embodiment, a first well contact is disposed in a portion of the first well. A second well is disposed over the substrate wherein the second well includes a material doped to the first conductivity type. In one embodiment, the first well and the second well are not in direct contact with one another.
摘要翻译：具有改进性能的肖特基结二极管器件是在常规CMOS工艺中制造的。形成包括掺杂到第一导电类型的材料的衬底。第一阱设置在衬底上。第一阱包括掺杂到与第一导电类型相反的第二导电类型的材料。含金属材料的区域设置在第一阱之上，以在含金属材料区域和第一阱之间的界面处形成肖特基结。在一个实施例中，第一井接触设置在第一井的一部分中。第二阱设置在衬底上，其中第二阱包括掺杂到第一导电类型的材料。在一个实施例中，第一井和第二井不彼此直接接触。

7. 发明授权

US07525349B2 Circuit for classifying signals 失效
标题翻译：电路分类信号
公开(公告)号：US07525349B2
公开(公告)日：2009-04-28
申请号：US11504390
申请日：2006-08-14
申请人： Jaideep Mavoori , Chris Diorio
发明人： Jaideep Mavoori , Chris Diorio
IPC分类号： H03K5/22
CPC分类号： H03F1/0277 , H03F3/68
摘要： A circuit for classification of analog input signals, comprising an analog memory component, such as a floating gate, used to store a threshold value; a threshold detection module used to determine whether the analog input signal exceeds the threshold value; a time delay module used to delay a processing of the analog signal; a time-amplitude window calculation module used to determine whether an amplitude of the analog input signal is between a lower limit and an upper limit of an amplitude window; and an output module indicating whether the amplitude of the analog signal is between the lower and the upper limit, wherein the indication is used to determine whether the analog input signal belongs to one of a plurality of analog signal classes. The classification is implemented in the analog domain, eliminating the need for sampling and digitizing the analog signal, consequently minimizing circuit area and power.
摘要翻译：一种用于模拟输入信号分类的电路，包括用于存储阈值的诸如浮动栅极的模拟存储器组件; 用于确定模拟输入信号是否超过阈值的阈值检测模块; 用于延迟模拟信号的处理的延时模块; 时间幅度窗口计算模块，用于确定模拟输入信号的振幅是否在幅度窗口的下限和下限之间; 以及输出模块，其指示模拟信号的幅度是否在下限和上限之间，其中，所述指示用于确定模拟输入信号是否属于多个模拟信号类别中的一个。分类在模拟域中实现，不需要对模拟信号进行采样和数字化，从而最小化电路面积和功率。

8. 发明申请

US20090105786A1 METHOD AND DEVICE FOR STRENGTHENING SYNAPTIC CONNECTIONS 审中-公开
标题翻译：用于加强快速连接的方法和装置
公开(公告)号：US20090105786A1
公开(公告)日：2009-04-23
申请号：US12255408
申请日：2008-10-21
申请人： Eberhard Fetz , Andrew Jackson , Jaideep Mavoori
发明人： Eberhard Fetz , Andrew Jackson , Jaideep Mavoori
IPC分类号： A61N1/36
CPC分类号： A61N1/326 , A61N1/36103 , A61N1/36135 , A61N1/36167 , A61N1/37205
摘要： The invention provides a method and device for inducing a conditioned neural response in a subject. The method comprises detecting spike activity in a first neural site in the subject; and delivering a stimulus pulse to a second neural site in the subject. The stimulus pulse is delivered within the time window for synaptic strengthening following the detecting of a spike. These two steps, detection and stimulation, are repeated continuously, typically for a day or two. The conditioned neural response is induced when a pattern of neural activity evoked by stimulation at the first neural site emulates a pattern of neural activity evoked by stimulation at the second neural site. The conditioned neural response persists for an extended period of time.
摘要翻译：本发明提供了用于在受试者中诱导经调节的神经反应的方法和装置。该方法包括检测受试者的第一神经位点中的刺激活性; 以及将刺激脉冲递送到受试者中的第二神经位点。刺激脉冲在检测到尖峰之后在时间窗口内递送用于突触强化。这两个步骤，检测和刺激，连续重复，通常一两天。当通过第一神经位点的刺激诱发的神经活动模式模拟在第二神经部位刺激诱发的神经活动的模式时，引发条件性神经反应。有条件的神经反应持续了很长一段时间。

9. 发明申请

US20080027348A1 Minimally Invasive Monitoring Systems for Monitoring a Patient's Propensity for a Neurological Event 审中-公开
标题翻译：用于监测患者神经事件倾向的微创监测系统
公开(公告)号：US20080027348A1
公开(公告)日：2008-01-31
申请号：US11766761
申请日：2007-06-21
申请人： John Harris , Kent Leyde , Jaideep Mavoori
发明人： John Harris , Kent Leyde , Jaideep Mavoori
IPC分类号： A61B5/0476
CPC分类号： A61N1/37229 , A61B5/0031 , A61B5/0476 , A61B5/4094 , A61B2560/0214 , A61N1/36064
摘要： The present invention provides systems and methods for ambulatory, long term monitoring of a physiological signal from a patient. At least a portion of the systems of the present invention may be implanted within the patient in a minimally invasive manner. In preferred embodiments, brain activity signals are sampled from the patient with an externally powered leadless implanted device and are transmitted to a handheld patient communication device for processing to estimate the patient's propensity for a seizure.
摘要翻译：本发明提供了用于从患者进行生理信号的长期监测的系统和方法。本发明的系统的至少一部分可以以微创方式植入患者体内。在优选实施例中，使用外部供电的无引入植入装置从患者对脑活动信号进行采样，并将其传送到手持式病人通信装置进行处理以估计患者癫痫发作倾向。

10. 发明申请

US20080027347A1 Minimally Invasive Monitoring Methods 审中-公开
标题翻译：微创监测方法
公开(公告)号：US20080027347A1
公开(公告)日：2008-01-31
申请号：US11766751
申请日：2007-06-21
申请人： John Harris , Kent Leyde , Jaideep Mavoori
发明人： John Harris , Kent Leyde , Jaideep Mavoori
IPC分类号： A61B5/0476
CPC分类号： A61N1/37229 , A61B5/0031 , A61B5/0476 , A61B5/4094 , A61B2560/0214 , A61N1/36064
摘要： The present invention provides methods for minimally invasive, long term monitoring of a physiological signal (e.g., neural signals) from a patient. In preferred embodiments, neural signals are sampled from the patient with an externally powered, leadless implanted device and are transmitted to an external device for further processing.
摘要翻译：本发明提供了用于对来自患者的生理信号（例如，神经信号）的微创长期监测的方法。在优选实施例中，使用外部供电的无引线植入装置从患者采集神经信号，并将其传输到外部装置以进一步处理。

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