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1. 发明授权

US09294135B2 Digital radio frequency (RF) receiver 有权
标题翻译：数字射频（RF）接收机
公开(公告)号：US09294135B2
公开(公告)日：2016-03-22
申请号：US13609638
申请日：2012-09-11
申请人： Ik Soo Eo , Sang-Kyun Kim , Mun Yang Park , Seon-Ho Han , Hyun Kyu Yu
发明人： Ik Soo Eo , Sang-Kyun Kim , Mun Yang Park , Seon-Ho Han , Hyun Kyu Yu
IPC分类号： H04B1/00
CPC分类号： H04B1/0021
摘要： A digital RF receiver does not use a separate receiver according to a mode and a band for multi-mode reception, MIMO reception, and bandwidth extension reception, and changes only setting variables in a single receiver structure so as to implement multi-mode reception, MIMO reception, bandwidth extension reception, and/or simultaneous multi-mode operation, such that complexity of the receiver, development cost, and power consumption can be reduced.
摘要翻译：数字RF接收机根据用于多模式接收，MIMO接收和带宽扩展接收的模式和频带不使用单独的接收机，并且仅改变单个接收机结构中的设置变量以便实现多模式接收， MIMO接收，带宽扩展接收和/或同时多模式操作，从而可以减少接收机的复杂性，开发成本和功耗。

2. 发明授权

US09276800B2 Single frequency synthesizer based FDD transceiver 有权
标题翻译：基于单频合成器的FDD收发器
公开(公告)号：US09276800B2
公开(公告)日：2016-03-01
申请号：US13608677
申请日：2012-09-10
申请人： Hyun Ho Boo , Seon-Ho Han , Jang Hong Choi , Ik Soo Eo , Hyun Kyu Yu
发明人： Hyun Ho Boo , Seon-Ho Han , Jang Hong Choi , Ik Soo Eo , Hyun Kyu Yu
IPC分类号： H04J1/02 , H04L27/38 , H04L27/20 , H04L27/233 , H04L27/36 , H04B1/00
CPC分类号： H04L27/3836 , H04B1/0007 , H04L27/206 , H04L27/2092 , H04L27/2332 , H04L27/362 , H04L27/3854
摘要： The present invention relates to a single frequency synthesizer based FDD transceiver. A single frequency synthesizer generates and provides a carrier frequency so that frequency up-conversion and frequency down-conversion can be performed at the time of transmission and reception. Accordingly, the area, power consumption, and design complexity of the entire system can be reduced, and the performance of the system can be improved.
摘要翻译：本发明涉及一种基于单频合成器的FDD收发器。单个频率合成器产生并提供载波频率，使得可以在发送和接收时执行上变频和下变频。因此，可以降低整个系统的面积，功耗和设计复杂性，并且可以提高系统的性能。

3. 发明授权

US07529663B2 Method for flexible bit rate code vector generation and wideband vocoder employing the same 失效
标题翻译：用于灵活比特率码矢量生成的方法和采用该方法的宽带声码器
公开(公告)号：US07529663B2
公开(公告)日：2009-05-05
申请号：US11216430
申请日：2005-08-30
申请人： Kyung-Jin Byun , Ik-Soo Eo , Kyung-Soo Kim , Hee-Bum Jung
发明人： Kyung-Jin Byun , Ik-Soo Eo , Kyung-Soo Kim , Hee-Bum Jung
IPC分类号： G10L19/12 , G10L19/10
CPC分类号： G10L19/107 , G10L19/24
摘要： Provided are a flexible bit rate code vector generation method and a wideband vocoder employing the same. This invention implements a flexible bit rate by getting three code vectors which are composed of 24, 16, and 8 pulses, at a time in a search process, through improvement of an algebraic codebook search process in a wideband AMR-WB vocoder. The method includes the steps of: performing a preprocess, wherein the preprocess divides a sub-frame by tracks and decides a pulse position having a maximum value in each track; among a plurality of pulses to be searched, fixing a same number of pulses as the tracks to the position with the maximum value of each track sequentially, and searching optimal positions having a minimum error with a target signal by combining two pulses in two consecutive tracks for the remaining pulses; and creating a code vector with flexible bit rate.
摘要翻译：提供了一种灵活的比特率码矢量生成方法和采用该方法的宽带声码器。本发明通过在宽带AMR-WB声码器中改进代数码本搜索处理，通过在搜索过程中一次获得由24,16和8脉冲组成的三个码向量来实现灵活的比特率。该方法包括以下步骤：执行预处理，其中预处理通过磁道划分子帧，并确定每个磁道中具有最大值的脉冲位置; 在要搜索的多个脉冲之间，将相同数量的脉冲固定到具有每个磁道的最大值的位置，并且通过在两个连续的轨道中组合两个脉冲来搜索具有目标信号的最小误差的最佳位置剩下的脉冲; 并创建一个具有灵活位速率的码矢量。

4. 发明申请

US20060136802A1 Hybrid trace back apparatus and high-speed viterbi decoding system using the same 有权
公开(公告)号：US20060136802A1
公开(公告)日：2006-06-22
申请号：US11263443
申请日：2005-10-31
申请人： In-San Jeon , Hyuk Kim , Kyung-Soo Kim , Ik-Soo Eo , Hee-Bum Jung
发明人： In-San Jeon , Hyuk Kim , Kyung-Soo Kim , Ik-Soo Eo , Hee-Bum Jung
IPC分类号： H03M13/03
CPC分类号： H03M13/395 , H03M13/4107 , H03M13/4192
摘要： A hybrid trace back apparatus and a high-speed Viterbi decoding system having the same are disclosed. The hybrid trace back apparatus includes: a register exchanging unit for receiving survivor values of each states from a path metric calculator, and obtaining a block survival value through a register exchange operation as much as a bit length for a block trace back operation; a first storing unit for the register exchange operation; a second storing unit for storing the block survival value obtained through the register exchange operation until the block survival value is written in a block trace back memory; and a block trace back unit for outputting decoded data by performing a block trace back operation while writing a value of the second storing unit.

5. 发明申请

US20060116872A1 Method for flexible bit rate code vector generation and wideband vocoder employing the same 失效
公开(公告)号：US20060116872A1
公开(公告)日：2006-06-01
申请号：US11216430
申请日：2005-08-30
申请人： Kyung-Jin Byun , Ik-Soo Eo , Kyung-Soo Kim , Hee-Bum Jung
发明人： Kyung-Jin Byun , Ik-Soo Eo , Kyung-Soo Kim , Hee-Bum Jung
IPC分类号： G10L19/12
CPC分类号： G10L19/107 , G10L19/24
摘要： Provided are a flexible bit rate code vector generation method and a wideband vocoder employing the same. This invention implements a flexible bit rate by getting three code vectors which are composed of 24, 16, and 8 pulses, at a time in a search process, through improvement of an algebraic codebook search process in a wideband AMR-WB vocoder. The method includes the steps of: performing a preprocess, wherein the preprocess divides a sub-frame by tracks and decides a pulse position having a maximum value in each track; among a plurality of pulses to be searched, fixing a same number of pulses as the tracks to the position with the maximum value of each track sequentially, and searching optimal positions having a minimum error with a target signal by combining two pulses in two consecutive tracks for the remaining pulses; and creating a code vector with flexible bit rate.

6. 发明授权

US5974102A Synchronizing circuit 失效
标题翻译：同步电路
公开(公告)号：US5974102A
公开(公告)日：1999-10-26
申请号：US929692
申请日：1997-09-15
申请人： Ik Soo Eo , Kwang Il Yeon , In Gi Lim
发明人： Ik Soo Eo , Kwang Il Yeon , In Gi Lim
IPC分类号： H03K19/003 , G06F5/06 , H04L7/00 , H04L7/02
CPC分类号： H04L7/02 , G06F5/06 , H04L7/0008
摘要： In case microcontroller and digital signal processing blocks are used together in one chip, there has been a problem in which the synchronization of the clocks are not consistent with each other when sending a signal from one block to another. In addition, when a reference clock is activated during a change of input signal, an incomplete interval has occurred. Accordingly, in order to solve the above mentioned problem, the present invention discloses a synchronizing circuit which uses a latch circuit("RS") consisted of NAND gates to synchronize an asynchronous input data and a reference clock, thereby solving the problem in which an incomplete interval occurs.
摘要翻译：在单片机和数字信号处理块在一个芯片中一起使用的情况下，存在当从一个块向另一个块发送信号时时钟的同步彼此不一致的问题。另外，当在输入信号变化期间激活参考时钟时，发生了不完整的间隔。因此，为了解决上述问题，本发明公开了一种使用由NAND门构成的锁存电路（“RS”）同步异步输入数据和参考时钟的同步电路，由此解决了不完整间隔发生。

7. 发明授权

US08693581B2 Signal receiver with digital front end supporting multiple band and signal receiving method using the same 有权
标题翻译：信号接收机具有数字前端支持多频带和信号接收方式
公开(公告)号：US08693581B2
公开(公告)日：2014-04-08
申请号：US13284751
申请日：2011-10-28
申请人： Sang-Kyun Kim , Ik Soo Eo , Mijeong Park , Hyun Kyu Yu
发明人： Sang-Kyun Kim , Ik Soo Eo , Mijeong Park , Hyun Kyu Yu
IPC分类号： H03K9/00 , H04L27/00
CPC分类号： H04B1/001 , H04B1/0021
摘要： Disclosed is a method for receiving an analog signal from a receiver supporting at least a first channel band and a second channel band. The method for receiving an analog signal includes sampling the analog signal received through an antenna, generating a decimated signal by passing the sampled signal to a CIC decimation filter; and inputting the decimated signal to a channel selection filter.
摘要翻译：公开了一种从支持至少第一信道频带和第二信道频带的接收机接收模拟信号的方法。用于接收模拟信号的方法包括对通过天线接收的模拟信号进行采样，通过将采样信号传递给CIC抽取滤波器来产生抽取信号; 并将抽取的信号输入到频道选择滤波器。

8. 发明申请

US20130163699A1 DIGITAL FRONT END RECEIVER USING DC OFFSET COMPENSATION SCHEME 有权
标题翻译：数字前端接收器使用直流偏移补偿方案
公开(公告)号：US20130163699A1
公开(公告)日：2013-06-27
申请号：US13609704
申请日：2012-09-11
申请人： Sang-Kyun Kim , Ik Soo Eo , Hyun Kyu Yu
发明人： Sang-Kyun Kim , Ik Soo Eo , Hyun Kyu Yu
IPC分类号： H04B1/16
CPC分类号： H04B1/0017 , H04B1/0021
摘要： The present invention relates to a digital front end receiver using a DC offset compensation scheme. The digital front end receiver includes a DC offset compensation filter configured to remove DC offset components from signals received from a digital mixer and a Cascaded Integrator-Comb (CIC) decimation filter configured to reduce a sampling rate of the signals received from the DC offset compensation block.
摘要翻译：本发明涉及使用DC偏移补偿方案的数字前端接收机。数字前端接收器包括DC偏移补偿滤波器，其被配置为从数字混频器接收的信号中去除DC偏移分量，并且Cascaded Integrator-Comb（CIC）抽取滤波器被配置为降低从DC偏移补偿接收到的信号的采样率块。

9. 发明申请

US20120163434A1 DIGITAL RECEIVER FOR MOBILE COMMUNICATION AND OPERATING METHOD 审中-公开
标题翻译：用于移动通信和操作方法的数字接收机
公开(公告)号：US20120163434A1
公开(公告)日：2012-06-28
申请号：US13331252
申请日：2011-12-20
申请人： Sang-Kyun Kim , Mijeong Park , Ik Soo Eo , Hyun Kyu Yu
发明人： Sang-Kyun Kim , Mijeong Park , Ik Soo Eo , Hyun Kyu Yu
IPC分类号： H04B1/38 , H04L27/00
CPC分类号： H04L27/0014 , H04B1/0007 , H04L25/03114 , H04L2027/0024
摘要： This invention is regarding mobile communication digital receiver and operating methods of a digital front end, which uses a digital mixer to change the center frequency to DC; a digital mixer allows the user to evade I/Q mismatch challenges; an Analog-to-Digital Converter (ADC) converts a Radio Frequency analog signal to a digital signal; a digital mixer converts the ADC's output signal's center frequency to DC; a digital front end has an automatic gain control over multiple frequency bands and contains a noise filter; a modem receives the digital front end's output and demodulates the signal.
摘要翻译：本发明涉及数字前端的移动通信数字接收机和操作方法，其使用数字混频器将中心频率改变为DC; 数字混合器允许用户逃避I / Q不匹配的挑战; 模拟数字转换器（ADC）将射频模拟信号转换为数字信号; 数字混频器将ADC的输出信号的中心频率转换为DC; 数字前端具有对多个频带的自动增益控制，并包含噪声滤波器; 调制解调器接收数字前端的输出并解调信号。

10. 发明授权

US07530010B2 Hybrid trace back apparatus and high-speed viterbi decoding system using the same 有权
标题翻译：混合追溯装置和使用相同的高速维特比解码系统
公开(公告)号：US07530010B2
公开(公告)日：2009-05-05
申请号：US11263443
申请日：2005-10-31
申请人： In-San Jeon , Hyuk Kim , Kyung-Soo Kim , Ik-Soo Eo , Hee-Bum Jung
发明人： In-San Jeon , Hyuk Kim , Kyung-Soo Kim , Ik-Soo Eo , Hee-Bum Jung
IPC分类号： H03M13/03
CPC分类号： H03M13/395 , H03M13/4107 , H03M13/4192
摘要： A hybrid trace back apparatus and a high-speed Viterbi decoding system having the same are disclosed. The hybrid trace back apparatus includes: a register exchanging unit for receiving survivor values of each states from a path metric calculator, and obtaining a block survival value through a register exchange operation as much as a bit length for a block trace back operation; a first storing unit for the register exchange operation; a second storing unit for storing the block survival value obtained through the register exchange operation until the block survival value is written in a block trace back memory; and a block trace back unit for outputting decoded data by performing a block trace back operation while writing a value of the second storing unit.
摘要翻译：公开了具有该混合追溯装置和高速维特比解码系统。混合追溯装置包括：寄存器交换单元，用于从路径度量计算器接收每个状态的幸存值，并通过寄存器交换操作获得块存活值，作为块追溯操作的位长; 用于寄存器交换操作的第一存储单元; 第二存储单元，用于存储通过寄存器交换操作获得的块存活值，直到块存储值被写入块追溯存储器; 以及块追溯单元，用于通过在写入第二存储单元的值的同时执行块追溯操作来输出解码数据。

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