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1. 发明授权

US09159767B2 Methods of manufacturing magnetoresistive random access memory devices 有权
标题翻译：制造磁阻随机存取存储器件的方法
公开(公告)号：US09159767B2
公开(公告)日：2015-10-13
申请号：US14182316
申请日：2014-02-18
申请人： Jong-Chul Park , Gwang-Hyun Baek , Hyung-Joon Kwon , In-Ho Kim , Chang-Woo Sun
发明人： Jong-Chul Park , Gwang-Hyun Baek , Hyung-Joon Kwon , In-Ho Kim , Chang-Woo Sun
IPC分类号： H01L43/12 , H01L27/22
CPC分类号： H01L27/228 , G11C11/161 , H01L43/12
摘要： In a method of an MRAM device, first and second patterns are formed on a substrate alternately and repeatedly in a second direction. Each first pattern and each second pattern extend in a first direction perpendicular to the second direction. Some of the second patterns are removed to form first openings extending in the first direction. Source lines filling the first openings are formed. A mask is formed on the first and second patterns and the source lines. The mask includes second openings in the first direction, each of which extends in the second direction. Portions of the second patterns exposed by the second openings are removed to form third openings. Third patterns filling the third openings are formed. The second patterns surrounded by the first and third patterns are removed to form fourth openings. Contact plugs filling the fourth openings are formed.
摘要翻译：在MRAM器件的方法中，第一和第二图案在第二方向上交替且重复地形成在衬底上。每个第一图案和每个第二图案沿垂直于第二方向的第一方向延伸。去除一些第二图案以形成沿第一方向延伸的第一开口。形成填充第一开口的源极线。在第一和第二图案和源极线上形成掩模。掩模包括沿第一方向的第二开口，每个开口沿第二方向延伸。由第二开口暴露的第二图案的部分被去除以形成第三开口。形成填充第三开口的第三图案。由第一图案和第三图案包围的第二图案被去除以形成第四开口。形成填充第四开口的接触塞。

2. 发明申请

US20140264672A1 MAGNETORESISTIVE RANDOM ACCESS MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME 有权
标题翻译：磁性随机访问存储器件及其制造方法
公开(公告)号：US20140264672A1
公开(公告)日：2014-09-18
申请号：US14182316
申请日：2014-02-18
申请人： Jong-Chul Park , Gwang-Hyun Baek , Hyung-Joon Kwon , In-Ho Kim , Chang-Woo Sun
发明人： Jong-Chul Park , Gwang-Hyun Baek , Hyung-Joon Kwon , In-Ho Kim , Chang-Woo Sun
IPC分类号： H01L27/22 , H01L43/12
CPC分类号： H01L27/228 , G11C11/161 , H01L43/12
摘要： In a method of an MRAM device, first and second patterns are formed on a substrate alternately and repeatedly in a second direction. Each first pattern and each second pattern extend in a first direction perpendicular to the second direction. Some of the second patterns are removed to form first openings extending in the first direction. Source lines filling the first openings are formed. A mask is formed on the first and second patterns and the source lines. The mask includes second openings in the first direction, each of which extends in the second direction. Portions of the second patterns exposed by the second openings are removed to form third openings. Third patterns filling the third openings are formed. The second patterns surrounded by the first and third patterns are removed to form fourth openings. Contact plugs filling the fourth openings are formed.
摘要翻译：在MRAM器件的方法中，第一和第二图案在第二方向上交替且重复地形成在衬底上。每个第一图案和每个第二图案沿垂直于第二方向的第一方向延伸。去除一些第二图案以形成沿第一方向延伸的第一开口。形成填充第一开口的源极线。在第一和第二图案和源极线上形成掩模。掩模包括沿第一方向的第二开口，每个开口沿第二方向延伸。由第二开口暴露的第二图案的部分被去除以形成第三开口。形成填充第三开口的第三图案。由第一图案和第三图案包围的第二图案被去除以形成第四开口。形成填充第四开口的接触塞。

3. 发明申请

US20130234267A1 MAGNETIC DEVICE 有权
标题翻译：磁性装置
公开(公告)号：US20130234267A1
公开(公告)日：2013-09-12
申请号：US13682737
申请日：2012-11-21
申请人： Ki-joon Kim , Hyung-joon Kwon
发明人： Ki-joon Kim , Hyung-joon Kwon
IPC分类号： H01L29/82
CPC分类号： H01L29/82 , G11C11/161 , H01L27/228 , H01L43/08 , H01L43/10
摘要： A magnetic body structure including: a magnetic layer pattern; and a conductive pattern including a metallic glass alloy and covering at least a portion of the magnetic body structure.
摘要翻译：一种磁体结构，包括：磁性层图案; 以及包括金属玻璃合金并覆盖至少一部分磁体结构的导电图案。

4. 发明授权

US06574771B1 Galios field processor having dual parallel data path for Bose Chaudhuri Hocquenghem/Reed-Solomon decoder 失效
标题翻译：用于Bose Chaudhuri Hocquenghem / Reed-Solomon解码器的具有双并行数据路径的Galios现场处理器
公开(公告)号：US06574771B1
公开(公告)日：2003-06-03
申请号：US09528676
申请日：2000-03-20
申请人： Hyung-joon Kwon
发明人： Hyung-joon Kwon
IPC分类号： H03M1300
CPC分类号： H03M13/6561 , H03M13/15 , H03M13/153 , H03M13/1555 , H03M13/158
摘要： A Galois field processor having a dual parallel data path for a Bose Chaudhuri Hocquenghem/Reed-Solomon (BCH/RS) decoder is provided. The Galois field processor includes a syndrome register block for storing syndrome values transmitted by a syndrome generating block, a correction polynomial register block, a connection polynomial register block, and a discrepancy register block. A dual mode Galois field data path (DMGFDP) includes a first data path for receiving the respective outputs of the syndrome register block, the correction polynomial register block, the connection polynomial register block, and the discrepancy register block, performing predetermined operations related to the even-degree coefficients of correction and connection polynomial, and outputting the even-degree coefficient output. A second data path performs predetermined operations related to the odd-degree coefficients of the correction and connection polynomial and outputs the odd-degree coefficient output. A delta output unit performs predetermined operations related to the even-degree and the odd-degree coefficients of the connections polynomial and outputs the delta output. An output unit outputs the coefficients of an error location polynomial, according to a control signal. Since the Galois processor, in which latency during the operation processes is minimized, has a small area and operates at high speed, the performance of the decoder is greatly improved.
摘要翻译：提供了一种具有用于Bose Chaudhuri Hocquenghem / Reed-Solomon（BCH / RS）解码器的双平行数据路径的Galois场处理器。伽罗瓦域处理器包括用于存储由校正子生成块，校正多项式寄存器块，连接多项式寄存器块和差异寄存器块发送的校正子值的校正子寄存器块。双模式伽罗瓦域数据路径（DMGFDP）包括用于接收校正子寄存器块，校正多项式寄存器块，连接多项式寄存器块和差异寄存器块的相应输出的第一数据路径，执行与校正和连接多项式的偶数系数，并输出偶数系数输出。第二数据路径执行与校正连接多项式的奇数系数相关的预定操作，并输出奇数系数输出。增量输出单元执行与连接多项式的偶数和奇数系数相关的预定操作并输出增量输出。输出单元根据控制信号输出误差位置多项式的系数。由于在操作过程中的延迟被最小化的Galois处理器具有小面积并且以高速操作，因此大大提高了解码器的性能。

5. 发明授权

US08847342B2 Magnetic device and method of manufacturing the same 有权
标题翻译：磁性装置及其制造方法
公开(公告)号：US08847342B2
公开(公告)日：2014-09-30
申请号：US13600422
申请日：2012-08-31
申请人： Woo-cheol Lee , Tokashiki Ken , Hyung-joon Kwon , Myung-hoon Jung
发明人： Woo-cheol Lee , Tokashiki Ken , Hyung-joon Kwon , Myung-hoon Jung
IPC分类号： H01L27/22
CPC分类号： C23F1/12 , C23F1/02 , C23F4/00 , G11B5/3163 , H01L27/228 , H01L43/08 , H01L43/12
摘要： A method of manufacturing a magnetic device includes forming a stack structure, the stack structure including a magnetic layer, and etching the stack structure by using an etching gas, the etching gas including at least 80% by volume of H2 gas.
摘要翻译：一种制造磁性器件的方法包括形成叠层结构，所述堆叠结构包括磁性层，并通过使用蚀刻气体蚀刻所述堆叠结构，所述蚀刻气体至少包含80体积％的H 2气体。

6. 发明授权

US08823119B2 Magnetic device having a metallic glass alloy 有权
标题翻译：具有金属玻璃合金的磁性装置
公开(公告)号：US08823119B2
公开(公告)日：2014-09-02
申请号：US13682737
申请日：2012-11-21
申请人： Ki-joon Kim , Hyung-joon Kwon
发明人： Ki-joon Kim , Hyung-joon Kwon
IPC分类号： H01L29/82 , H01L27/22 , H01L43/08 , H01L43/10
CPC分类号： H01L29/82 , G11C11/161 , H01L27/228 , H01L43/08 , H01L43/10
摘要： A magnetic body structure including: a magnetic layer pattern; and a conductive pattern including a metallic glass alloy and covering at least a portion of the magnetic body structure.
摘要翻译：一种磁体结构，包括：磁性层图案; 以及包括金属玻璃合金并覆盖至少一部分磁体结构的导电图案。

7. 发明申请

US20130146997A1 MAGNETIC DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：磁性装置及其制造方法
公开(公告)号：US20130146997A1
公开(公告)日：2013-06-13
申请号：US13600422
申请日：2012-08-31
申请人： Woo-cheol LEE , Tokashiki KEN , Hyung-joon KWON , Myung-hoon JUNG
发明人： Woo-cheol LEE , Tokashiki KEN , Hyung-joon KWON , Myung-hoon JUNG
IPC分类号： H01L43/12 , H01L27/22
CPC分类号： C23F1/12 , C23F1/02 , C23F4/00 , G11B5/3163 , H01L27/228 , H01L43/08 , H01L43/12
摘要： A method of manufacturing a magnetic device includes forming a stack structure, the stack structure including a magnetic layer, and etching the stack structure by using an etching gas, the etching gas including at least 80% by volume of H2 gas.
摘要翻译：一种制造磁性器件的方法包括形成叠层结构，所述堆叠结构包括磁性层，并通过使用蚀刻气体蚀刻所述堆叠结构，所述蚀刻气体至少包含80体积％的H 2气体。

8. 发明申请

US20130008867A1 METHODS FOR MANUFACTURING MAGNETIC TUNNEL JUNCTION STRUCTURE 审中-公开
标题翻译：制造磁性隧道结构的方法
公开(公告)号：US20130008867A1
公开(公告)日：2013-01-10
申请号：US13533385
申请日：2012-06-26
申请人： Ken Tokashiki , Hyung-Joon Kwon , Myeong-Cheol Kim
发明人： Ken Tokashiki , Hyung-Joon Kwon , Myeong-Cheol Kim
IPC分类号： H01F41/00
CPC分类号： H01F41/302 , B82Y40/00
摘要： Methods for manufacturing a magnetic tunnel junction structure include forming a magnetic tunnel junction (MTJ) layer by sequentially stacking a first ferromagnetic layer, a tunnel insulation layer, and a second ferromagnetic layer on a substrate, forming a mask pattern on the MTJ layer, and etching at least a portion of the MTJ layer in an etching chamber using the mask pattern as an etch mask, wherein the etching of the at least a portion of the MTJ layer includes applying a RF source power to a first electrode of the etching chamber as first RF power in a first pulselike mode, and applying a RF bias power to a second electrode of the etching chamber as second RF power in a second pulselike mode. The second pulselike mode of the RF bias power has a different phase from the first pulselike mode of the RF source power.
摘要翻译：用于制造磁性隧道结结构的方法包括通过在衬底上依次堆叠第一铁磁层，隧道绝缘层和第二铁磁层来形成磁隧道结（MTJ）层，在MTJ层上形成掩模图案，以及使用掩模图案蚀刻蚀刻室中的MTJ层的至少一部分作为蚀刻掩模，其中对MTJ层的至少一部分的蚀刻包括将RF源功率施加到蚀刻室的第一电极作为第一脉冲模式中的第一RF功率，以及以第二脉冲模式的第二RF功率将RF偏置功率施加到蚀刻室的第二电极。 RF偏置功率的第二脉动模式与RF源功率的第一脉动模式具有不同的相位。

9. 发明授权

US07266748B2 Method and apparatus for correcting C1/PI word errors using error locations detected by EFM/EFM+ decoding 失效
标题翻译：使用由EFM / EFM +解码检测到的错误位置来校正C1 / PI字错误的方法和装置
公开(公告)号：US07266748B2
公开(公告)日：2007-09-04
申请号：US10824407
申请日：2004-04-14
申请人： Hyung-joon Kwon
发明人： Hyung-joon Kwon
IPC分类号： H03M13/29
CPC分类号： G11B20/1866 , G11B20/1833
摘要： A method and system for error correcting C1/PI words using error locations detected by EFM/EFM+ decoder are provided. The method for channel decoding and error correcting includes: (a) setting up a channel code; (b) producing demodulated data including information data symbols and erasure flags by modulating channel data symbols, using the channel code; and (c) performing an error-erasure correction on the information data symbols of the demodulated data, using error locations indicated by the erasure flags. The system for channel decoding and error correcting includes a channel decoder with a channel code for producing the demodulated data having the information data symbols and the erasure flags by demodulating the channel data symbols, a memory for storing the demodulated data, and a decoding unit for performing an error-erasure correction on the information data symbols, using the error locations indicated by the erasure flags having a predetermined value.
摘要翻译：提供了一种使用由EFM / EFM +解码器检测到的错误位置对C 1 / PI字进行纠错的方法和系统。信道解码和纠错方法包括：（a）建立信道码; （b）使用信道码，通过调制信道数据符号来产生包括信息数据符号和擦除标志的解调数据; 以及（c）使用由擦除标志指示的错误位置对解调数据的信息数据符号执行错误校正。用于信道解码和纠错的系统包括具有信道码的信道解码器，用于产生具有信息数据符号的解调数据和通过解调信道数据符号的擦除标志，用于存储解调数据的存储器和用于使用由具有预定值的擦除标志指示的错误位置对信息数据符号执行错误校正。

10. 发明申请

US20060184863A1 Memory device for use in high-speed block pipelined reed-solomon decoder, method of accessing the memory device, and reed-solomon decoder having the memory device 失效
公开(公告)号：US20060184863A1
公开(公告)日：2006-08-17
申请号：US11396775
申请日：2006-04-03
申请人： Hyung-joon Kwon , Il-man Bae
发明人： Hyung-joon Kwon , Il-man Bae
IPC分类号： H03M13/00
CPC分类号： G06F11/1008 , G11C7/1039 , G11C8/12 , H03M13/1515 , H03M13/154 , H03M13/1555 , H03M13/6566
摘要： A random access memory (RAM) device for use in a high-speed pipelined Reed-Solomon decoder, a method of accessing the memory device, and a Reed-Solomon decoder having the memory device are provided. The memory device, which data is written to and read from at the same time during decoding of one frame of data, includes a random access memory (RAM) having a plurality of banks; and a control circuit for setting a first bank pointer, which selects a first bank among the plurality of banks, and a second bank pointer which selects a second bank among the plurality of banks, wherein the first and second bank pointers are set to banks with a predetermined offset every frame of data.

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