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2. 发明授权

US5950094A Method for fabricating fully dielectric isolated silicon (FDIS) 有权
标题翻译：完全介电隔离硅（FDIS）制造方法
公开(公告)号：US5950094A
公开(公告)日：1999-09-07
申请号：US252510
申请日：1999-02-18
申请人： Shih-Chi Lin , Hui-ju Yu , Yen-Ming Chen , Hui-Hua Chang
发明人： Shih-Chi Lin , Hui-ju Yu , Yen-Ming Chen , Hui-Hua Chang
IPC分类号： H01L21/762 , H01L21/76
CPC分类号： H01L21/76245 , H01L21/76264 , H01L21/7627 , H01L21/76283 , Y10S148/05 , Y10S438/96
摘要： The present invention provides a method of fabricating fully dielectric isolated silicon (FDIS) by anodizing a buried doped silicon layer through trenches formed between active areas to form a porous silicon layer; oxidizing the porous silicon layer through the trenches to form a buried oxide layer; and by depositing a dielectric in the trenches. The process begins by forming a buried doped layer in a silicon substrate defining a silicon top layer over the conductive buried doped layer. The silicon top layer and the buried doped layer are patterned to form trenches that extend into but not through the buried doped layer. The trenches define isolated silicon regions. The buried doped layer is anodized to form a porous silicon layer. The porous silicon layer is converted into a buried oxide layer by oxidation. The oxidation step also forms a liner oxide layer on the tops and sidewalls of the isolated silicon regions. Ion species can optionally be implanted into the sidewalls of the isolated silicon regions to form lightly doped regions to act as channel stops. A fill oxide layer is deposited over the buried oxide layer and the liner oxide layer. The fill oxide layer and the liner oxide layer are removed down to the level of the top of the isolated silicon regions thereby exposing a fully dielectric isolated silicon.
摘要翻译：本发明提供了通过在有源区之间形成的沟槽阳极氧化掩埋掺杂硅层来制造全介电隔离硅（FDIS）的方法，以形成多孔硅层; 通过沟槽氧化多孔硅层以形成掩埋氧化物层; 并通过在沟槽中沉积电介质。该过程开始于在硅衬底中形成掩埋掺杂层，该衬底在导电掩埋掺杂层上限定硅顶层。图案化硅顶层和掩埋掺杂层以形成延伸到但不穿过掩埋掺杂层的沟槽。沟槽定义了隔离的硅区域。掩埋掺杂层被阳极化以形成多孔硅层。通过氧化将多孔硅层转化为掩埋氧化物层。氧化步骤还在隔离硅区域的顶部和侧壁上形成衬垫氧化物层。可以将离子种类任选地注入到隔离的硅区域的侧壁中以形成轻掺杂区域，以充当通道停止。填埋氧化物层沉积在掩埋氧化物层和衬里氧化物层上。将填充氧化物层和衬垫氧化物层去除到分离的硅区域的顶部的水平面，从而暴露完全介电的隔离硅。

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