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1. 发明授权

US5418959A Instruction operation size optimization 失效
标题翻译：指令操作大小优化
公开(公告)号：US5418959A
公开(公告)日：1995-05-23
申请号：US983466
申请日：1992-11-30
申请人： Kevin J. Smith , Hugh R. Kenner
发明人： Kevin J. Smith , Hugh R. Kenner
IPC分类号： G06F9/318 , G06F9/45 , G06F9/44
CPC分类号： G06F9/30192 , G06F8/4434 , G06F8/447
摘要： An improved optimizer, in conjunction with a set of initial instruction ordinal assignment policies, a set of instruction ordinal adjustment policies and a set of instruction ordinal to instruction operation size mapping policies, is provided to the code generator of a compiler of the target machine. In addition to logic for performing standard optimizations, the improved optimizer further comprises logic for assigning initial instruction ordinals to instructions in the code being generated for the program being compiled in accordance to the assignment policies, iteratively adjusting the assigned instruction ordinals in accordance to the adjustment policies until they converge into a set of compatible and optimized instruction ordinals, and mapping the final instruction ordinals to instruction operation sizes, inserting additional code where necessary, in accordance to the mapping policies.
摘要翻译：改进的优化器结合一组初始指令序数分配策略，一组指令序调整策略和一组指令操作大小映射策略的指令被提供给目标机器的编译器的代码生成器。除了用于执行标准优化的逻辑之外，改进的优化器还包括用于将初始指令序数分配给根据分配策略为正被编译的程序生成的代码中的指令的逻辑，根据调整来迭代地调整分配的指令序数策略，直到它们收敛到一组兼容和优化的指令序列，并将最终指令序数映射到指令操作大小，根据映射策略在必要时插入附加代码。

2. 发明授权

US5367651A Integrated register allocation, instruction scheduling, instruction reduction and loop unrolling 失效
标题翻译：集成寄存器分配，指令调度，指令简化和循环展开
公开(公告)号：US5367651A
公开(公告)日：1994-11-22
申请号：US982962
申请日：1992-11-30
申请人： Kevin J. Smith , Hugh R. Kenner , William A. Savage , Alice Kwong
发明人： Kevin J. Smith , Hugh R. Kenner , William A. Savage , Alice Kwong
IPC分类号： G06F9/45 , G06F12/00
CPC分类号： G06F8/441 , G06F8/443 , G06F8/452
摘要： An improved register allocator, an improved instruction scheduler, an instruction combiner, and an improved loop unroller is provided to the code generator of a compiler of a computer system. Both the improved instruction scheduler and the improved loop unroller support a "preliminary" and a "final" mode of operation. Upon invocation, the improved register allocator determines and prioritizes regions of the program being compiled. Next, the improved register allocator, in cooperation with the improved instruction scheduler, the instruction combiner, and the improved loop unroller, determines the optimal partitioning for global and local registers for each region. Then, the improved register allocator allocates registers to each region based on the determined number of global registers for the region. After allocating registers for each region, the improved register allocator merges the regions together. The improved loop unroller and the improved instruction scheduler are then invoked successively in "final" mode to unroll the various loops and schedule the instructions being generated.
摘要翻译：将改进的寄存器分配器，改进的指令调度器，指令组合器和改进的循环未布告器提供给计算机系统的编译器的代码生成器。改进的指令调度器和改进的循环读取器都支持“初步”和“最终”操作模式。在调用时，改进的寄存器分配器确定正在编译的程序的区域并对其进行优先级排序。接下来，改进的寄存器分配器与改进的指令调度器，指令组合器和改进的循环unroller协作，确定每个区域的全局和本地寄存器的最佳分区。然后，改进的寄存器分配器基于确定的该区域的全局寄存器的数量向每个区域分配寄存器。在为每个区域分配寄存器之后，改进的寄存器分配器将区域合并在一起。然后，以“最终”模式连续地调用改进的循环单元和改进的指令调度器来展开各种循环并调度所生成的指令。

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