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    • 7. 发明授权
    • Method for improving manufacturing process of self-aligned contact
    • 改善自对准接触制造工艺的方法
    • US6165879A
    • 2000-12-26
    • US426979
    • 1999-10-26
    • Tzung-Han LeeHsi-Chien Lin
    • Tzung-Han LeeHsi-Chien Lin
    • H01L21/60H01L21/3205
    • H01L21/76897
    • The invention is related to a method for increasing margin precision of a self-aligned contact. A semiconductor has at least a gate electrode and source/drain, and a gate spacer is formed on the sidewall of the gate electrode. A first silicon oxide layer is then formed on the semiconductor substrate. A hard mask layer is formed on the first silicon oxide layer. A second silicon oxide layer is then deposited over the hard mask layer. A chemical mechanical polishing is then performed to remove the second silicon oxide layer so that the hard mask layer is planarized. Thereafter, the hard mask layer and the first silicon oxide layer is etched to form a gap region on the first silicon oxide layer. A polysilicon layer is then deposited over the entire substrate including the gap region and the hard mask layer. Thereafter, the polysilicon layer is etched back to form a polysilicon spacer. Finally, the gap region of the first silicon oxide layer is etched to form a self-aligned contact.
    • 本发明涉及一种用于增加自对准接触的裕量精度的方法。 半导体至少具有栅电极和源极/漏极,并且栅极间隔物形成在栅电极的侧壁上。 然后在半导体衬底上形成第一氧化硅层。 在第一氧化硅层上形成硬掩模层。 然后在硬掩模层上沉积第二氧化硅层。 然后执行化学机械抛光以除去第二氧化硅层,使得硬掩模层被平坦化。 此后,蚀刻硬掩模层和第一氧化硅层,以在第一氧化硅层上形成间隙区域。 然后在包括间隙区域和硬掩模层的整个基板上沉积多晶硅层。 此后,多晶硅层被回蚀以形成多晶硅间隔物。 最后,蚀刻第一氧化硅层的间隙区域以形成自对准接触。