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    • 1. 发明专利
    • 制御装置及び電力デマンド抑制システム
    • 控制装置和功率需求抑制系统
    • JP2014236601A
    • 2014-12-15
    • JP2013117079
    • 2013-06-03
    • 石田 秀樹Hideki Ishida秀樹 石田
    • ISHIDA HIDEKI
    • H02J3/00H02J7/34H02J9/08H02J13/00
    • Y02B70/3225Y02B90/222Y04S20/12Y04S20/222
    • 【課題】既設のデマンド監視装置を利用可能であり、負荷への電力供給を低減若しくは遮断する必要のない電力デマンド抑制システム、及び、そのような電力デマンド抑制システムを構築可能な制御装置を提供する。【解決手段】制御装置1は、デマンド監視装置3から警報信号が入力されたときに、負荷装置5に対する電源4からの電力供給を遮断させるための第1切替信号を切替信号出力端子部13から出力するとともに、第1信号出力端子部14から蓄電装置7を起動させる起動信号を出力し、起動信号出力後、デマンド監視装置3から警報解除信号が入力されたときに、負荷装置5に対する電源4からの電力供給を再開させるための第2切替信号を切替信号出力端子部13から出力するとともに、第1信号出力端子部14から蓄電装置7を停止させる停止信号を出力する。【選択図】図1
    • 要解决的问题:提供一种能够利用现有的需求监控装置的电力需求抑制系统,并且消除了减少或阻断对负载的电力供应的必要性,并提供能够构建其的控制装置。解决方案:控制装置 1从需求监视装置3输入警报信号时,从开关信号输出端子部13输出用于阻断从电力线4向负载装置5供电的第一开关信号; 从第一信号输出端子部14输出用于启动蓄电装置7的启动信号; 从开关信号输出端子部13输出用于从电力线4重新开始向负载装置5供电的第二开关信号; 并从第一信号输出端子部14输出用于停止蓄电装置7的停止信号。
    • 4. 发明授权
    • Image forming apparatus
    • 图像形成装置
    • US07692814B2
    • 2010-04-06
    • US11320436
    • 2005-12-28
    • Hideki IshidaShingo YoshidaHirohito Kondoh
    • Hideki IshidaShingo YoshidaHirohito Kondoh
    • G06F15/00G06K1/00
    • H04N1/4015G03G15/5037G03G2215/0005G03G2215/0119
    • Disclosed is the prevention of the occurrence of uneven image density, as well as the image degradation caused by inhibiting the continuity of image density, produced by the photoreceptor in which uneven electrification exists, and additionally uneven sensitivity coexists, without enlargement of the apparatus as well as increase in the cost. To the exposure amount obtained by the approximate linear transformation of the pixel gradation in each segment multi-divided in the surface of the photoreceptor drum 1, in all the pixel gradation including 0 level, exposing source 2 is controlled to expose with the amount of exposure, offset with only the offset exposure amount Ea which corresponds to the difference between the initial electric potential and the reference initial electric potential V0 of the segment. The exposure amount adjustment of the offset exposure amount Ea is conducted by offsetting the exposure time in each pixel.
    • 公开了防止不均匀图像浓度的发生,以及由于抑制由存在不均匀带电的感光体产生的图像密度的连续性引起的图像劣化,并且另外不均匀的灵敏度共存,而不会使装置扩大 随着成本的增加。 对于通过在感光鼓1的表面中多分割的每个片段中的像素等级的近似线性变换获得的曝光量,在包括0电平的所有像素等级中,曝光源2被控制以曝光量曝光 ,仅偏移对应于该段的初始电位和基准初始电位V0之间的差的偏移曝光量Ea。 通过偏移每个像素中的曝光时间来进行偏移曝光量Ea的曝光量调整。
    • 5. 发明申请
    • ADAPTIVE EQUALIZER CIRCUIT
    • 自适应均衡器电路
    • US20090310666A1
    • 2009-12-17
    • US12543109
    • 2009-08-18
    • Hisakatsu YAMAGUCHIShunichiro MasakiHideki IshidaKohtaroh Gotoh
    • Hisakatsu YAMAGUCHIShunichiro MasakiHideki IshidaKohtaroh Gotoh
    • H03H7/40H03K5/159
    • H04L25/03885H04B3/145
    • An adaptive equalizer circuit includes an equalizer circuit configured to produce an output data signal in response to an equalizing factor, a data detecting circuit configured to detect a signal level of the output data signal in a given unit time at predetermined timing, a boundary detecting circuit configured to detect a signal level of the output data signal at a timing that is ½ unit time away from the predetermined timing, and a control unit configured to detect, multiple times, a pattern having consecutive data items of a first value followed by a data item of a second value, and to adjust the equalizing factor such that a data detection value and a boundary detection value obtained for the data item of the second value are equal to each other a certain percentage of times, and are different from each other substantially the same percentage of times.
    • 自适应均衡器电路包括:均衡器电路,被配置为响应于均衡因素产生输出数据信号;数据检测电路,被配置为在预定定时在给定的单位时间内检测输出数据信号的信号电平;边界检测电路 被配置为在距所述预定定时的1/2单位时间的定时检测所述输出数据信号的信号电平;以及控制单元,被配置为多次检测具有第一值的数据的后续数据的模式, 项目,并且调整均衡因子,使得对于第二值的数据项获得的数据检测值和边界检测值彼此相等一定百分比,并且基本上彼此不同 相同百分比的时间。
    • 7. 发明授权
    • Process for producing solid electrolytic capacitor
    • 固体电解电容器生产工艺
    • US07326260B2
    • 2008-02-05
    • US11075729
    • 2005-03-10
    • Eizo FujiiHideki Ishida
    • Eizo FujiiHideki Ishida
    • H01G9/00
    • H01G9/012H01G9/15H01G11/56Y02E60/13Y10T29/417
    • The invention provides a process for fabricating a solid electrolytic capacitor of the chip type which process includes the steps of plating a fabrication frame comprising an anode terminal member and a cathode terminal member projecting from a pair of side frame members respectively so as to be opposed to each other, the anode terminal member being stepped so as to provide a lower portion toward the cathode terminal member, a hole extending vertically and being formed in each of the anode terminal member and a higher portion of the cathode terminal member, joining an anode lead of a capacitor element to an upper surface of the cathode terminal member and a bottom surface of the capacitor element to an upper surface of the lower portion of the cathode terminal member, forming a packaging resin portion around the capacitor element without permitting resin to ingress into the holes, and cutting the anode and cathode terminal members along vertical planes extending through the respective holes.
    • 本发明提供了一种制造芯片型固体电解电容器的方法,该方法包括以下步骤:分别对从包括一对侧框架构件突出的阳极端子构件和阴极端子构件的制造框架进行电镀以与 另一方面,阳极端子部件是阶梯状的,以向阴极端子部件提供下部,垂直延伸并形成在阳极端子部件和阴极端子部件的较高部分中的孔,将阳极引线 电容器元件的上表面和电容器元件的底表面到阴极端子构件的下部的上表面,在电容器元件周围形成封装树脂部分,而不允许树脂进入 孔,并且沿着延伸穿过相应的垂直平面切割阳极和阴极端子构件 孔。