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1. 发明申请

US20110101467A1 STACKED SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：堆叠半导体器件及其制造方法
公开(公告)号：US20110101467A1
公开(公告)日：2011-05-05
申请号：US12986739
申请日：2011-01-07
申请人： Kyung-Tae Jang , Ju-Bum Lee , Jae-Kyo Chung , Heung-Seop Song , Mi-Young Lee
发明人： Kyung-Tae Jang , Ju-Bum Lee , Jae-Kyo Chung , Heung-Seop Song , Mi-Young Lee
IPC分类号： H01L27/088
CPC分类号： H01L27/0688 , H01L27/088
摘要： A stacked semiconductor device includes a first gate structure formed on a substrate, a first insulating interlayer covering the first gate structure on the substrate, a first active pattern formed through and on the first insulating interlayer and contacting the substrate, a second gate structure formed on the first active pattern and the first insulating interlayer, a buffer layer covering the second gate structure on the first active pattern and the first insulating interlayer, a second insulating interlayer formed on the buffer layer, and a contact plug formed through the first and second insulating interlayers, which contacts with the substrate and is insulated from the second gate structure by the buffer layer. Operation failures of a transistor in the stacked semiconductor device can be reduced because the buffer layer prevents a word line from being electrically connected to the contact plug.
摘要翻译：叠层半导体器件包括：形成在衬底上的第一栅极结构，覆盖衬底上的第一栅极结构的第一绝缘层，形成在第一绝缘中间层上并在第一绝缘中间层上并与衬底接触的第一有源图案;第二栅极结构，第一有源图案和第一绝缘中间层，覆盖第一有源图案上的第二栅极结构和第一绝缘中间层的缓冲层，形成在缓冲层上的第二绝缘夹层，以及通过第一和第二绝缘体形成的接触塞中间层，其与衬底接触并且通过缓冲层与第二栅极结构绝缘。由于缓冲层防止字线电连接到接触插塞，所以可以减少层叠半导体器件中的晶体管的操作故障。

2. 发明申请

US20080111198A1 Stacked semiconductor device and method of manufacturing the same 审中-公开
标题翻译：叠层半导体器件及其制造方法
公开(公告)号：US20080111198A1
公开(公告)日：2008-05-15
申请号：US11978330
申请日：2007-10-29
申请人： Kyung-Tae Jang , Ju-Bum Lee , Jae-Kyo Chung , Heung-Seop Song , Mi-Young Lee
发明人： Kyung-Tae Jang , Ju-Bum Lee , Jae-Kyo Chung , Heung-Seop Song , Mi-Young Lee
IPC分类号： H01L27/088 , H01L21/8244
CPC分类号： H01L27/0688 , H01L27/088
摘要： A stacked semiconductor device includes a first gate structure formed on a substrate, a first insulating interlayer covering the first gate structure on the substrate, a first active pattern formed through and on the first insulating interlayer and contacting the substrate, a second gate structure formed on the first active pattern and the first insulating interlayer, a buffer layer covering the second gate structure on the first active pattern and the first insulating interlayer, a second insulating interlayer formed on the buffer layer, and a contact plug formed through the first and second insulating interlayers, which contacts with the substrate and is insulated from the second gate structure by the buffer layer. Operation failures of a transistor in the stacked semiconductor device can be reduced because the buffer layer prevents a word line from being electrically connected to the contact plug.
摘要翻译：叠层半导体器件包括：形成在衬底上的第一栅极结构，覆盖衬底上的第一栅极结构的第一绝缘层，形成在第一绝缘中间层上并在第一绝缘中间层上并与衬底接触的第一有源图案;第二栅极结构，第一有源图案和第一绝缘中间层，覆盖第一有源图案上的第二栅极结构和第一绝缘中间层的缓冲层，形成在缓冲层上的第二绝缘夹层，以及通过第一和第二绝缘体形成的接触塞中间层，其与衬底接触并且通过缓冲层与第二栅极结构绝缘。由于缓冲层防止字线电连接到接触插塞，所以可以减少叠层半导体器件中的晶体管的操作故障。

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