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    • 1. 发明授权
    • FinFET transistor device on SOI and method of fabrication
    • SOI上的FinFET晶体管器件及其制造方法
    • US07300837B2
    • 2007-11-27
    • US10836295
    • 2004-04-30
    • Hau-Yu ChenChang-Yun ChangCheng-Chung HuangFu-Liang Yang
    • Hau-Yu ChenChang-Yun ChangCheng-Chung HuangFu-Liang Yang
    • H01L21/8238
    • H01L29/785H01L29/66628H01L29/66795H01L29/7854
    • A FinFET transistor on SOI device and method of fabrication is provided. At least two FinFET fins each having an upper poly-silicate glass portion and a lower silicon portion are formed using spacer patterning technology. Each fin is formed on a sacrificial SiN mask layer having a sacrificial support structure. The SiN mask is removed and then a breakthrough etch is applied to remove an underlying pad oxide layer. A PSG layer defining a width of each of the fins on a sidewall of each of the support structures is deposited on each of the support structures. At least two fins each having a narrow fin pitch of about 0.25 μm. are formed. The fins provide a seed layer for at least two selective epitaxially raised source and drain regions, wherein each raised source-drain associated with each fin are interconnected thus forming a source pad and a drain pad.
    • 提供了SOI器件上的FinFET晶体管及其制造方法。 使用间隔物图案化技术形成至少两个FinFET翅片,每个鳍状物具有上部多晶硅玻璃部分和下部硅部分。 每个翅片形成在具有牺牲支撑结构的牺牲SiN掩模层上。 去除SiN掩模,然后施加穿透蚀刻以去除下面的衬垫氧化物层。 限定每个支撑结构的侧壁上的每个翅片的宽度的PSG层沉积在每个支撑结构上。 至少两个翅片各自具有约0.25μm的窄翅片间距。 形成。 翅片提供用于至少两个选择性外延凸起的源极和漏极区域的种子层,其中与每个鳍片相关联的每个凸起的源极 - 漏极互连,从而形成源极焊盘和漏极焊盘。
    • 2. 发明申请
    • FinFET transistor device on SOI and method of fabrication
    • SOI上的FinFET晶体管器件及其制造方法
    • US20050242395A1
    • 2005-11-03
    • US10836295
    • 2004-04-30
    • Hau-Yu ChenChang-Yun ChangCheng-Chung HuangFu-Liang Yang
    • Hau-Yu ChenChang-Yun ChangCheng-Chung HuangFu-Liang Yang
    • H01L21/336H01L29/78H01L29/786
    • H01L29/785H01L29/66628H01L29/66795H01L29/7854
    • A FinFET transistor on SOI device and method of fabrication is provided. At least two FinFET fins each having an upper poly-silicate glass portion and a lower silicon portion are formed using spacer patterning technology. Each fin is formed on a sacrificial SiN mask layer having a sacrificial support structure. The SiN mask is removed and then a breakthrough etch is applied to remove an underlying pad oxide layer. A PSG layer defining a width of each of the fins on a sidewall of each of the support structures is deposited on each of the support structures. At least two fins each having a narrow fin pitch of about 0.25 μm. are formed. The fins provide a seed layer for at least two selective epitaxially raised source and drain regions, wherein each raised source-drain associated with each fin are interconnected thus forming a source pad and a drain pad.
    • 提供了SOI器件上的FinFET晶体管及其制造方法。 使用间隔物图案化技术形成至少两个FinFET翅片,每个鳍状物具有上部多晶硅玻璃部分和下部硅部分。 每个翅片形成在具有牺牲支撑结构的牺牲SiN掩模层上。 去除SiN掩模,然后施加穿透蚀刻以去除下面的衬垫氧化物层。 限定每个支撑结构的侧壁上的每个翅片的宽度的PSG层沉积在每个支撑结构上。 至少两个翅片各自具有约0.25μm的窄翅片间距。 形成。 翅片提供用于至少两个选择性外延凸起的源极和漏极区域的种子层,其中与每个鳍片相关联的每个凸起的源极 - 漏极互连,从而形成源极焊盘和漏极焊盘。