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1. 发明申请

US20140049162A1 DEFECT REDUCTION IN PLASMA PROCESSING 审中-公开
标题翻译：等离子体加工中的缺陷减少
公开(公告)号：US20140049162A1
公开(公告)日：2014-02-20
申请号：US13586790
申请日：2012-08-15
申请人： George Thomas , Bart van Schravendijk , Harald Te Nijenhuis , Shawn Hamilton
发明人： George Thomas , Bart van Schravendijk , Harald Te Nijenhuis , Shawn Hamilton , Konstantin Makhratchev
IPC分类号： H05H1/24
CPC分类号： H05H1/24 , C23C16/0245 , C23C16/50 , H01J37/32853 , H01J37/32871
摘要： Methods and apparatus to reduce particle-induced defects on a substrate are provided. In certain embodiments, the methods involve decreasing plasma spread prior to extinguishing the plasma. The plasma is maintained at the decreased plasma spread while particles are evacuated from the processing chamber. In certain embodiments, the methods involve decreasing plasma power prior to extinguishing the plasma. The low-power plasma is maintained while particles are evacuated from the processing chamber.
摘要翻译：提供了减少基板上的颗粒引起的缺陷的方法和装置。在某些实施方案中，所述方法涉及在扑灭血浆之前降低血浆扩散。等离子体保持在降低的等离子体扩散，而颗粒从处理室抽空。在某些实施例中，该方法包括在熄灭等离子体之前降低等离子体功率。当从处理室排出颗粒时，保持低功率等离子体。

2. 发明申请

US20120149213A1 BOTTOM UP FILL IN HIGH ASPECT RATIO TRENCHES 审中-公开
标题翻译：底部填充在高比例比例
公开(公告)号：US20120149213A1
公开(公告)日：2012-06-14
申请号：US13313735
申请日：2011-12-07
申请人： Lakshminarayana Nittala , Karena Shannon , Nerissa Draeger , Megha Rathod , Harald Te Nijenhuis , Bart Van Schravendijk , Michael Danek
发明人： Lakshminarayana Nittala , Karena Shannon , Nerissa Draeger , Megha Rathod , Harald Te Nijenhuis , Bart Van Schravendijk , Michael Danek
IPC分类号： H01L21/31 , C23C16/02 , C23C16/40
CPC分类号： C23C16/401 , C23C16/02 , C23C16/045 , H01L21/02211 , H01L21/02216 , H01L21/02219 , H01L21/02274 , H01L21/02315 , H01L21/02318 , H01L21/67207 , H01L21/76224
摘要： Provided are novel methods of filling gaps with a flowable dielectric material. According to various embodiments, the methods involve performing a surface treatment on the gap to enhance subsequent bottom up fill of the gap. In certain embodiments, the treatment involves exposing the surface to activated species, such as activated species of one or more of nitrogen, oxygen, and hydrogen. In certain embodiments, the treatment involves exposing the surface to a plasma generated from a mixture of nitrogen and oxygen. The treatment may enable uniform nucleation of the flowable dielectric film, reduce nucleation delay, increase deposition rate and enhance feature-to-feature fill height uniformity.
摘要翻译：提供了用可流动电介质材料填充间隙的新颖方法。根据各种实施例，所述方法包括在间隙上执行表面处理以增强间隙的随后的向上填充。在某些实施方案中，处理包括将表面暴露于活化物质，例如氮，氧和氢中的一种或多种的活化物质。在某些实施方案中，处理包括将表面暴露于由氮和氧的混合物产生的等离子体。该处理可以实现可流动电介质膜的均匀成核，减少成核延迟，增加沉积速率并增强特征 - 特征填充高度均匀性。

3. 发明授权

US06541400B1 Process for CVD deposition of fluorinated silicon glass layer on semiconductor wafer 有权
标题翻译：氟化硅玻璃层在半导体晶片上CVD沉积的工艺
公开(公告)号：US06541400B1
公开(公告)日：2003-04-01
申请号：US09501347
申请日：2000-02-09
申请人： Jason L. Tian , Harald Te Nijenhuis
发明人： Jason L. Tian , Harald Te Nijenhuis
IPC分类号： H01L2131
CPC分类号： H01J37/32082 , C23C16/401 , H01L21/02131 , H01L21/02211 , H01L21/02274 , H01L21/31629
摘要： An improved process for depositing a robust fluorosilicate glass film on a substrate in a chamber includes maintaining a total pressure in the chamber of less than about 1.7 torr, introducing vapor phase chemicals such as N2, SiF4, SiH4, and N2O into the chamber, and reacting the vapor-phase chemicals with sufficiently supplied energy to deposit a thin film layer of the fluorosilicate glass on the substrate. Advantageously, the deposited fluorosilicate glass films are chemically, mechanically, and thermally stable without additional processing. Also advantageously, the films are deposited uniformly at rates greater than about 5000 Angstroms per minute with dielectric constants of about 3.4 to about 3.9.
摘要翻译：在室中的衬底上沉积坚固的氟硅酸盐玻璃膜的改进方法包括将腔室中的总压力维持在小于约1.7托，将诸如N 2，SiF 4，SiH 4和N 2 O的气相化学物质引入室中，以及使气相化学品与足够提供的能量反应以在衬底上沉积氟硅酸盐玻璃的薄膜层。有利地，沉积的氟硅酸盐玻璃膜是化学，机械和热稳定的，而不需要额外的处理。还有利地，以大约每分钟约5000埃的速率均匀地沉积膜，介电常数为约3.4至约3.9。

4. 发明授权

US09719169B2 System and apparatus for flowable deposition in semiconductor fabrication 有权
公开(公告)号：US09719169B2
公开(公告)日：2017-08-01
申请号：US13329078
申请日：2011-12-16
申请人： Jonathan D. Mohn , Harald te Nijenhuis , Shawn M. Hamilton , Kevin Madrigal , Ramkishan Rao Lingampalli
发明人： Jonathan D. Mohn , Harald te Nijenhuis , Shawn M. Hamilton , Kevin Madrigal , Ramkishan Rao Lingampalli
IPC分类号： H01L21/687 , H01L21/67 , C23C16/458 , C23C16/40 , C23C16/455 , C23C16/46
CPC分类号： C23C16/401 , C23C16/45565 , C23C16/45574 , C23C16/4585 , C23C16/4586 , C23C16/463 , H01L21/67109 , H01L21/6719 , H01L21/68785 , H01L21/68792 , Y10T279/34
摘要： Electronic device fabrication processes, apparatuses and systems for flowable gap fill or flowable deposition techniques are described. In some implementations, a semiconductor fabrication chamber is described which is configured to maintain a semiconductor wafer at a temperature near 0° C. while maintaining most other components within the fabrication chamber at temperatures on the order of 5-10° C. or higher than the wafer temperature.

5. 发明授权

US08133797B2 Protective layer to enable damage free gap fill 有权
标题翻译：保护层使无损空隙填充
公开(公告)号：US08133797B2
公开(公告)日：2012-03-13
申请号：US12122614
申请日：2008-05-16
申请人： Bart van Schravendijk , Richard S. Hill , Wilbert van den Hoek , Harald te Nijenhuis
发明人： Bart van Schravendijk , Richard S. Hill , Wilbert van den Hoek , Harald te Nijenhuis
IPC分类号： H01L21/76
CPC分类号： H01L21/76224 , C23C16/045 , C23C16/401 , H01L21/76801
摘要： In-situ semiconductor process that can fill high aspect ratio (typically at least 6:1, for example 7:1 or higher), narrow width (typically sub 0.13 micron, for example 0.1 micron or less) gaps without damaging underlying features and little or no incidence of voids or weak spots is provided. A protective layer is deposited to protect underlying features in regions of the substrate having lower feature density so that unwanted material may be removed from regions of the substrate having higher feature density. This protective layer may deposits thicker on a low density feature than on a high density feature and may be deposited using a PECVD process or low sputter/deposition ratio HDP CVD process. This protective layer may also be a metallic oxide layer that is resistant to fluorine etching, such as zirconium oxide (ZrO2) or aluminum oxide (Al2O3).
摘要翻译：可以填充高纵横比（通常至少6:1，例如7:1或更高），窄宽度（通常为0.13微米，例如0.1微米或更小）的间隙的原位半导体工艺，而不损坏底层特征和少量或者不提供空隙或弱点的发生。沉积保护层以保护具有较低特征密度的衬底区域中的底层特征，使得可以从具有较高特征密度的衬底的区域去除不需要的材料。该保护层可以在低密度特征上比在高密度特征上沉积更厚，并且可以使用PECVD工艺或低溅射/沉积比HDP CVD工艺沉积。该保护层也可以是耐氟蚀刻的金属氧化物层，例如氧化锆（ZrO 2）或氧化铝（Al 2 O 3）。

6. 发明申请

US20090286381A1 Protective Layer To Enable Damage Free Gap Fill 有权
标题翻译：保护层可以防止空隙填充
公开(公告)号：US20090286381A1
公开(公告)日：2009-11-19
申请号：US12122614
申请日：2008-05-16
申请人： Bart van Schravendijk , Richard S. Hill , Wilbert van den Hoek , Harald te Nijenhuis
发明人： Bart van Schravendijk , Richard S. Hill , Wilbert van den Hoek , Harald te Nijenhuis
IPC分类号： H01L21/762
CPC分类号： H01L21/76224 , C23C16/045 , C23C16/401 , H01L21/76801
摘要： In-situ semiconductor process that can fill high aspect ratio (typically at least 6:1, for example 7:1 or higher), narrow width (typically sub 0.13 micron, for example 0.1 micron or less) gaps without damaging underlying features and little or no incidence of voids or weak spots is provided. A protective layer is deposited to protect underlying features in regions of the substrate having lower feature density so that unwanted material may be removed from regions of the substrate having higher feature density. This protective layer may deposits thicker on a low density feature than on a high density feature and may be deposited using a PECVD process or low sputter/deposition ratio HDP CVD process. This protective layer may also be a metallic oxide layer that is resistant to fluorine etching, such as zirconium oxide (ZrO2) or aluminum oxide (Al2O3).
摘要翻译：可以填充高纵横比（通常至少6:1，例如7:1或更高），窄宽度（通常为0.13微米，例如0.1微米或更小）的间隙的原位半导体工艺，而不损坏底层特征和少量或者不提供空隙或弱点的发生。沉积保护层以保护具有较低特征密度的衬底区域中的底层特征，使得可以从具有较高特征密度的衬底的区域去除不需要的材料。该保护层可以在低密度特征上比在高密度特征上沉积更厚，并且可以使用PECVD工艺或低溅射/沉积比HDP CVD工艺沉积。该保护层也可以是耐氟蚀刻的金属氧化物层，例如氧化锆（ZrO 2）或氧化铝（Al 2 O 3）。

7. 发明授权

US08058179B1 Atomic layer removal process with higher etch amount 有权
标题翻译：具有更高蚀刻量的原子层去除工艺
公开(公告)号：US08058179B1
公开(公告)日：2011-11-15
申请号：US12343102
申请日：2008-12-23
申请人： Nerissa Draeger , Harald te Nijenhuis , Henner Meinhold , Bart van Schravendijk , Lakshmi Nittala
发明人： Nerissa Draeger , Harald te Nijenhuis , Henner Meinhold , Bart van Schravendijk , Lakshmi Nittala
IPC分类号： H01L21/302
CPC分类号： H01L21/31116 , H01L21/02164 , H01L21/02271 , H01L21/02274 , H01L21/02337 , H01L21/76837
摘要： Higher overall etch rate and throughput for atomic layer removal (ALR) is achieved. The reaction is a self-limiting process, thus limiting the total amount of material that may be etched per cycle. By pumping down the process station between reacting operations, the reaction is partially “reset.” A higher overall etch rate is achieved by a multiple exposure with pump down ALR process.
摘要翻译：实现更高的总体蚀刻速率和原子层去除（ALR）的吞吐量。反应是一种自限制过程，因此限制了每个循环可蚀刻的材料的总量。通过在反应操作之间泵送工艺站，反应部分地“重新设置”。通过多次曝光通过泵浦ALR工艺实现更高的总体蚀刻速率。

8. 发明授权

US07981763B1 Atomic layer removal for high aspect ratio gapfill 有权
标题翻译：用于高纵横比填缝的原子层去除
公开(公告)号：US07981763B1
公开(公告)日：2011-07-19
申请号：US12341943
申请日：2008-12-22
申请人： Bart van Schravendijk , Harald te Nijenhuis
发明人： Bart van Schravendijk , Harald te Nijenhuis
IPC分类号： H01L21/76
CPC分类号： H01L21/76837 , H01L21/02274 , H01L21/31116 , H01L21/76224
摘要： Methods of filling high aspect ratio, narrow width (e.g., sub-50 nm) gaps on a substrate are provided. The methods provide gap fill with little or no incidence of voids, seams or weak spots. According to various embodiments, the methods depositing dielectric material in the gaps to partially fill the gaps, then performing multi-step atomic layer removal process to selectively etch unwanted material deposited on the sidewalls of the gaps. The multi-step atomic layer removal process involves a performing one or more initial atomic layer removal operations to remove unwanted material deposited at the top of the gap, followed by one or more subsequent atomic layer removal operations to remove unwanted material deposited on the sidewalls of the gap. Each atomic layer removal operation involves selectively chemically reacting a portion of the fill material with one or more reactants to form a solid reaction product, which is then removed.
摘要翻译：提供填充高纵横比，衬底上的窄宽度（例如，小于50nm）间隙的方法。这些方法提供空隙填充，空隙，接缝或弱点几乎没有或没有发生。根据各种实施例，在间隙中沉积介电材料以部分地填充间隙的方法，然后执行多步骤原子层去除工艺以选择性地蚀刻沉积在间隙的侧壁上的不需要的材料。多步骤原子层去除过程涉及执行一个或多个初始原子层去除操作以去除在间隙的顶部沉积的不需要的材料，随后进行一个或多个后续的原子层去除操作以去除沉积在侧壁上的不需要的材料差距。每个原子层去除操作涉及使填充材料的一部分与一种或多种反应物选择性地化学反应以形成固体反应产物，然后将其去除。

9. 发明授权

US09121097B2 Variable showerhead flow by varying internal baffle conductance 有权
标题翻译：可变淋浴头流动通过改变内部挡板电导
公开(公告)号：US09121097B2
公开(公告)日：2015-09-01
申请号：US13631364
申请日：2012-09-28
申请人： Jonathan D. Mohn , Shawn M. Hamilton , Harald te Nijenhuis , Jeffrey E. Lorelli , Kevin Madrigal
发明人： Jonathan D. Mohn , Shawn M. Hamilton , Harald te Nijenhuis , Jeffrey E. Lorelli , Kevin Madrigal
IPC分类号： B05B5/00 , C23C16/455 , H01J37/32
CPC分类号： H01J37/32633 , C23C16/45565 , C23C16/45589 , H01J37/3244
摘要： Apparatuses and techniques for providing for variable radial flow conductance within a semiconductor processing showerhead are provided. In some cases, the radial flow conductance may be varied dynamically during use. In some cases, the radial flow conductance may be fixed but may vary as a function of radial distance from the showerhead centerline. Both single plenum and dual plenum showerheads are discussed.
摘要翻译：提供了用于在半导体处理花洒内提供可变径向流动电导的装置和技术。在某些情况下，径向流动电导在使用过程中可能会动态变化。在一些情况下，径向流动电导可以是固定的，但是可以随着与喷头中心线的径向距离的函数而变化。讨论了单室和双室淋浴喷头。

10. 发明申请

US20140061324A1 VARIABLE SHOWERHEAD FLOW BY VARYING INTERNAL BAFFLE CONDUCTANCE 有权
标题翻译：通过变化的内部通道导致变化的淋浴
公开(公告)号：US20140061324A1
公开(公告)日：2014-03-06
申请号：US13631364
申请日：2012-09-28
申请人： Jonathan D. Mohn , Shawn M. Hamilton , Harald te Nijenhuis , Jeffrey E. Lorelli , Kevin Madrigal
发明人： Jonathan D. Mohn , Shawn M. Hamilton , Harald te Nijenhuis , Jeffrey E. Lorelli , Kevin Madrigal
IPC分类号： B05B1/14
CPC分类号： H01J37/32633 , C23C16/45565 , C23C16/45589 , H01J37/3244
摘要： Apparatuses and techniques for providing for variable radial flow conductance within a semiconductor processing showerhead are provided. In some cases, the radial flow conductance may be varied dynamically during use. In some cases, the radial flow conductance may be fixed but may vary as a function of radial distance from the showerhead centerline. Both single plenum and dual plenum showerheads are discussed.
摘要翻译：提供了用于在半导体处理花洒内提供可变径向流动电导的装置和技术。在某些情况下，径向流动电导在使用过程中可能会动态变化。在一些情况下，径向流动电导可以是固定的，但是可以随着与喷头中心线的径向距离的函数而变化。讨论了单室和双室淋浴喷头。

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