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1. 发明授权

US08129710B2 Plasmon enhanced nanowire light emitting diode 有权
标题翻译：等离子体增强纳米线发光二极管
公开(公告)号：US08129710B2
公开(公告)日：2012-03-06
申请号：US12262451
申请日：2008-10-31
申请人： Hans Cho , David Fattal , Nathaniel Quitoriano
发明人： Hans Cho , David Fattal , Nathaniel Quitoriano
IPC分类号： H01L33/00
CPC分类号： H01L33/18
摘要： A nanowire light emitting diode (LED) and method of emitting light employ a plasmonic mode. The nanowire LED includes a nanowire having a semiconductor junction, a shell layer coaxially surrounding the nanowire, and an insulating layer, which is plasmonically thin, isolating the shell layer from the nanowire. The shell layer supports a surface plasmon that couples to the semiconductor junction by an evanescent field. Light is generated in a vicinity of the semiconductor junction and the surface plasmon is coupled to the semiconductor junction during light generation. The coupling enhances one or both of an efficiency of light emission and a light emission rate of the LED. A method of making the nanowire LED includes forming the nanowire, providing the insulating layer on the surface of the nanowire, and forming the shell layer on the insulating layer in the vicinity of the semiconductor junction.
摘要翻译：纳米线发光二极管（LED）和发光的方法采用等离子体激发模式。纳米线LED包括具有半导体结的纳米线，同轴地围绕纳米线的壳层，以及等离子体薄的绝缘层，将壳层与纳米线隔离。壳层支撑通过ev逝场耦合到半导体结的表面等离子体。在半导体结附近产生光，并且在光产生期间，表面等离子体激元耦合到半导体结。耦合增强了LED的发光效率和发光速率的一个或两个。制造纳米线LED的方法包括形成纳米线，在纳米线的表面上提供绝缘层，并在半导体结附近的绝缘层上形成壳层。

2. 发明申请

US20110006348A1 ROUNDED THREE-DIMENSIONAL GERMANIUM ACTIVE CHANNEL FOR TRANSISTORS AND SENSORS 失效
标题翻译：用于晶体管和传感器的三维三维有源通道
公开(公告)号：US20110006348A1
公开(公告)日：2011-01-13
申请号：US12501259
申请日：2009-07-10
申请人： Hans Cho , Theodore I. Kamins , Nathaniel Quitoriano
发明人： Hans Cho , Theodore I. Kamins , Nathaniel Quitoriano
IPC分类号： H01L29/423 , H01L21/336 , H01L29/78
CPC分类号： H01L29/423 , B82Y10/00 , G01N27/414 , H01L21/02532 , H01L21/02636 , H01L21/02667 , H01L29/0665 , H01L29/0673 , H01L29/125 , H01L29/205 , H01L29/66439 , H01L29/775 , H01L29/7854
摘要： A process is provided for fabricating rounded three-dimensional germanium active channels for transistors and sensors. For forming sensors, the process comprises providing a crystalline silicon substrate; depositing an oxide mask on the crystalline silicon substrate; patterning the oxide mask with trenches to expose linear regions of the silicon substrate; epitaxially grow germanium selectively in the trenches, seeded from the silicon wafer; optionally etching the SiO2 mask partially, so that the cross section resembles a trapezoid on a stem; and annealing at an elevated temperature. The annealing process forms the rounded channel. For forming transistors, the process further comprises depositing and patterning a gate oxide and gate electrode onto this structure to form the gate stack of a MOSFET device; and after patterning the gate, implanting dopants into the source and drain located on the parts of the germanium cylinder on either side of the gate line.
摘要翻译：提供了一种用于制造用于晶体管和传感器的圆形三维锗活性通道的工艺。对于形成传感器，该方法包括提供晶体硅衬底; 在所述晶体硅衬底上沉积氧化物掩模; 用沟槽图案化氧化物掩模以暴露硅衬底的线性区域; 在沟槽中选择性地外延生长锗，从硅晶片接种; 可选地部分地蚀刻SiO 2掩模，使得横截面类似于杆上的梯形; 并在高温退火。退火过程形成圆形通道。为了形成晶体管，该工艺还包括将栅极氧化物和栅电极沉积并图案化到该结构上以形成MOSFET器件的栅叠层; 并且在图案化栅极之后，将掺杂剂注入位于栅极线两侧的锗圆筒部分上的源极和漏极。

3. 发明申请

US20070287238A1 Si nanowire substrate, method of manufacturing the same, and method of manufacturing thin film transistor using the same 有权
标题翻译： Si纳米线基板，其制造方法以及使用其制造薄膜晶体管的方法
公开(公告)号：US20070287238A1
公开(公告)日：2007-12-13
申请号：US11889471
申请日：2007-08-14
申请人： Hans Cho , Takashi Noguchi , Wenxu Xianyu , Do-Young Kim , Huaxiang Yin , Xlaoxin Zhang
发明人： Hans Cho , Takashi Noguchi , Wenxu Xianyu , Do-Young Kim , Huaxiang Yin , Xlaoxin Zhang
IPC分类号： H01L21/336 , B32B17/02
CPC分类号： H01L29/78654 , H01L29/0673 , H01L29/66772 , H01L29/78696 , Y10S977/762 , Y10S977/814 , Y10S977/90 , Y10S977/938 , Y10T428/26
摘要： A silicon nanowire substrate having a structure in which a silicon nanowire film having a fine line-width is formed on a substrate, a method of manufacturing the same, and a method of manufacturing a thin film transistor using the same. The method of manufacturing the silicon nanowire substrate includes preparing a substrate, forming an insulating film on the substrate, forming a silicon film on the insulating film, patterning the insulating film and the silicon film into a strip shape, reducing the line-width of the insulating film by undercut etching at least one lateral side of the insulating film, and forming a self-aligned silicon nanowire film on an upper surface of the insulating film by melting and crystallizing the silicon film.
摘要翻译：具有其中在衬底上形成具有细线宽度的硅纳米线膜的结构的硅纳米线衬底，其制造方法以及使用其制造薄膜晶体管的方法。制造硅纳米线基板的方法包括：准备基板，在基板上形成绝缘膜，在绝缘膜上形成硅膜，将绝缘膜和硅膜图形化成带状，减小线宽通过对绝缘膜的至少一个侧面进行底切蚀刻来绝缘膜，并且通过使硅膜熔化和结晶，在绝缘膜的上表面上形成自对准硅纳米线膜。

4. 发明申请

US20070111605A1 Semiconductor devices including transistors and methods of fabricating the same 有权
标题翻译：包括晶体管的半导体器件及其制造方法
公开(公告)号：US20070111605A1
公开(公告)日：2007-05-17
申请号：US11600741
申请日：2006-11-17
申请人： Xiaoxin Zhang , Wenxu Xianyu , Takashi Noguchi , Hans Cho , Huaxiang Yin
发明人： Xiaoxin Zhang , Wenxu Xianyu , Takashi Noguchi , Hans Cho , Huaxiang Yin
IPC分类号： H01R24/00
CPC分类号： H01L21/823412 , H01L21/823456 , H01L21/823807 , H01L21/82385
摘要： A semiconductor device includes a transistor. The transistor includes a substrate having an inclined surface, a first upper surface extending from a lower portion of the inclined surface, and a second upper surface extending from an upper end of the inclined surface. A gate stack structure is formed on the inclined surface and includes a gate electrode. A first impurity region formed on one of the first and second upper surfaces contacts the gate stack structure. A second impurity region formed on the second upper surface contacts the gate stack structure. A channel between the first and second impurity regions is formed along the inclined surface in a crystalline direction.
摘要翻译：半导体器件包括晶体管。晶体管包括具有倾斜表面的基板，从倾斜表面的下部延伸的第一上表面和从倾斜表面的上端延伸的第二上表面。栅极堆叠结构形成在倾斜表面上并且包括栅电极。形成在第一和第二上表面中的一个上的第一杂质区域接触栅极堆叠结构。形成在第二上表面上的第二杂质区域接触栅堆叠结构。第一和第二杂质区之间的通道在结晶方向上沿着倾斜表面形成。

5. 发明申请

US20060267017A1 Semi-conductor-on-insulator structure, semiconductor devices using the same and method of manufacturing the same 有权
公开(公告)号：US20060267017A1
公开(公告)日：2006-11-30
申请号：US11397866
申请日：2006-04-05
申请人： Takashi Noguchi , Hans Cho , Wenxu Xianyu , Huaxiang Yin , Xiaoxin Zhang
发明人： Takashi Noguchi , Hans Cho , Wenxu Xianyu , Huaxiang Yin , Xiaoxin Zhang
IPC分类号： H01L29/76
CPC分类号： H01L29/78687 , H01L29/66742 , H01L29/78603
摘要： Semiconductor-on-insulator (SOI) structures, semiconductor devices using the same and methods of manufacturing the same, and more particularly, to a structure with a single-crystalline (for example, germanium (x-Ge)) layer on an insulating layer, semiconductor devices using the same, and methods of manufacturing the same. The SOI structure may include a single-crystalline substrate formed of a first semiconductor material, a first insulating layer formed on the substrate and having at least one window exposing a portion of the substrate, a first epitaxial growth region formed on a surface of the substrate exposed by the window and formed of at least one of the first semiconductor material and a second semiconductor material, and a first single-crystalline layer formed on the first insulating layer and the first epitaxial growth region and formed of the second semiconductor material, and crystallized using a surface of the first epitaxial growth region as a seed layer for crystallization.

6. 发明申请

US20060261409A1 Si nanowire substrate, method of manufacturing the same, and method of manufacturing thin film transistor using the same 有权
标题翻译： Si纳米线基板，其制造方法以及使用其制造薄膜晶体管的方法
公开(公告)号：US20060261409A1
公开(公告)日：2006-11-23
申请号：US11341519
申请日：2006-01-30
申请人： Hans Cho , Takashi Noguchi , Wenxu Xianyu , Do-Young Kim , Huaxiang Yin , Xiaoxin Zhang
发明人： Hans Cho , Takashi Noguchi , Wenxu Xianyu , Do-Young Kim , Huaxiang Yin , Xiaoxin Zhang
IPC分类号： H01L27/12
CPC分类号： H01L29/78654 , H01L29/0673 , H01L29/66772 , H01L29/78696 , Y10S977/762 , Y10S977/814 , Y10S977/90 , Y10S977/938 , Y10T428/26
摘要： A silicon nanowire substrate having a structure in which a silicon nanowire film having a fine line-width is formed on a substrate, a method of manufacturing the same, and a method of manufacturing a thin film transistor using the same. The method of manufacturing the silicon nanowire substrate includes preparing a substrate, forming an insulating film on the substrate, forming a silicon film on the insulating film, patterning the insulating film and the silicon film into a strip shape, reducing the line-width of the insulating film by undercut etching at least one lateral side of the insulating film, and forming a self-aligned silicon nanowire film on an upper surface of the insulating film by melting and crystallizing the silicon film.
摘要翻译：具有其中在衬底上形成具有细线宽度的硅纳米线膜的结构的硅纳米线衬底，其制造方法以及使用其制造薄膜晶体管的方法。制造硅纳米线基板的方法包括：准备基板，在基板上形成绝缘膜，在绝缘膜上形成硅膜，将绝缘膜和硅膜图形化成带状，减小线宽通过对绝缘膜的至少一个侧面进行底切蚀刻来绝缘膜，并且通过使硅膜熔化和结晶，在绝缘膜的上表面上形成自对准硅纳米线膜。

7. 发明申请

US20060084204A1 Method of manufacturing a thin film transistor 有权
公开(公告)号：US20060084204A1
公开(公告)日：2006-04-20
申请号：US11199272
申请日：2005-08-09
申请人： Huaxiang Yin , Wenxu Xianyu , Takashi Noguchi , Hans Cho , Ji-sim Jung
发明人： Huaxiang Yin , Wenxu Xianyu , Takashi Noguchi , Hans Cho , Ji-sim Jung
IPC分类号： H01L21/84
CPC分类号： H01L21/02675 , H01L21/2026 , H01L21/84 , H01L27/1203 , H01L29/66795 , H01L29/785
摘要： A method of manufacturing a thin film transistor is provided. The method includes forming an amorphous silicon layer on a substrate, forming a source region, a drain region, and a region of a plurality of channels electrically interposed between the source region and the drain region by patterning the amorphous silicon layer, annealing a region of the channels, sequentially forming a gate oxide film and a gate electrode on a channel surface, and doping the source region and the drain region.

8. 发明申请

US20060102888A1 Semiconductor substrate and method of fabricating the same 审中-公开
标题翻译：半导体衬底及其制造方法
公开(公告)号：US20060102888A1
公开(公告)日：2006-05-18
申请号：US11270629
申请日：2005-11-10
申请人： Hans Cho , Wenxu Xianyu
发明人： Hans Cho , Wenxu Xianyu
IPC分类号： H01L31/109
CPC分类号： H01L21/26506 , H01L21/02381 , H01L21/0245 , H01L21/02488 , H01L21/02494 , H01L21/02502 , H01L21/02532 , H01L21/02667 , H01L21/02675 , H01L21/268
摘要： A semiconductor substrate and a method of fabricating the same are provided. The semiconductor substrate includes: a Si substrate; a SiO2 layer having a predetermined width formed on the Si substrate; a SiGe layer having a first end portion and a second end portion at both sides and formed on the Si substrate and the SiO2 layer to bury the SiO2 layer, and generated from both the first and second ends using epitaxial growth; and strained Si layers, in which lattice mismatch of Si is induced, formed on the SiGe layer above the SiO2 layer using epitaxial growth.
摘要翻译：提供半导体衬底及其制造方法。半导体衬底包括：Si衬底; 在Si衬底上形成具有预定宽度的SiO 2层; SiGe层，其具有第一端部和两侧的第二端部，并形成在Si衬底和SiO 2层上以埋置SiO 2层，并且产生从第一和第二端使用外延生长; 使用外延生长在SiO 2层上方的SiGe层上形成Si的晶格失配的应变Si层。

9. 发明申请

US20060094212A1 Thin film transistor and method of manufacturing the same 有权
公开(公告)号：US20060094212A1
公开(公告)日：2006-05-04
申请号：US11248620
申请日：2005-10-13
申请人： Takashi Noguchi , Wenxu Xianyu , Hans Cho , Huaxiang Yin
发明人： Takashi Noguchi , Wenxu Xianyu , Hans Cho , Huaxiang Yin
IPC分类号： H01L21/20
CPC分类号： H01L21/02598 , H01L21/02532 , H01L21/02667 , H01L21/2026 , H01L27/1281 , H01L29/66772
摘要： A thin film transistor (TFT) and a method of manufacturing the same are provided. The TFT includes a transparent substrate, an insulating layer on a region of the transparent substrate, a monocrystalline silicon layer, which includes source, drain, and channel regions, on the insulating layer and a gate insulating film and a gate electrode on the channel region of the monocrystalline silicon layer.

10. 发明授权

US08101473B2 Rounded three-dimensional germanium active channel for transistors and sensors 失效
标题翻译：用于晶体管和传感器的圆形三维锗活性通道
公开(公告)号：US08101473B2
公开(公告)日：2012-01-24
申请号：US12501259
申请日：2009-07-10
申请人： Hans Cho , Theodore I Kamins , Nathaniel Quitoriano
发明人： Hans Cho , Theodore I Kamins , Nathaniel Quitoriano
IPC分类号： H01L21/00 , H01L21/84
CPC分类号： H01L29/423 , B82Y10/00 , G01N27/414 , H01L21/02532 , H01L21/02636 , H01L21/02667 , H01L29/0665 , H01L29/0673 , H01L29/125 , H01L29/205 , H01L29/66439 , H01L29/775 , H01L29/7854
摘要： A process is provided for fabricating rounded three-dimensional germanium active channels for transistors and sensors. For forming sensors, the process comprises providing a crystalline silicon substrate; depositing an oxide mask on the crystalline silicon substrate; patterning the oxide mask with trenches to expose linear regions of the silicon substrate; epitaxially grow germanium selectively in the trenches, seeded from the silicon wafer; optionally etching the SiO2 mask partially, so that the cross section resembles a trapezoid on a stem; and annealing at an elevated temperature. The annealing process forms the rounded channel. For forming transistors, the process further comprises depositing and patterning a gate oxide and gate electrode onto this structure to form the gate stack of a MOSFET device; and after patterning the gate, implanting dopants into the source and drain located on the parts of the germanium cylinder on either side of the gate line.
摘要翻译：提供了一种用于制造用于晶体管和传感器的圆形三维锗活性通道的工艺。对于形成传感器，该方法包括提供晶体硅衬底; 在所述晶体硅衬底上沉积氧化物掩模; 用沟槽图案化氧化物掩模以暴露硅衬底的线性区域; 在沟槽中选择性地外延生长锗，从硅晶片接种; 可选地部分地蚀刻SiO 2掩模，使得横截面类似于杆上的梯形; 并在高温退火。退火过程形成圆形通道。为了形成晶体管，该工艺还包括将栅极氧化物和栅电极沉积并图案化到该结构上以形成MOSFET器件的栅叠层; 并且在图案化栅极之后，将掺杂剂注入位于栅极线两侧的锗圆筒部分上的源极和漏极。

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