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    • 3. 发明申请
    • Fingerprint recognition module having a thin-film structure and comprising resistive temperature-sensitive elements
    • 指纹识别模块具有薄膜结构并且包括电阻性温度敏感元件
    • US20060050935A1
    • 2006-03-09
    • US10513331
    • 2003-05-15
    • Burkhard BustgensGerald UrbanJoachim AurichGunter Igel
    • Burkhard BustgensGerald UrbanJoachim AurichGunter Igel
    • G06K9/00
    • G06K9/0002
    • The invention relates to a fingerprint recognition module comprising a substrate consisting of a material that is electrically insulating at least on its upper side and at least partially thermally insulating. Said substrate receives a composite of structured thin films on its surface, which directly forms a measuring field on the surface of the substrate for measuring a fingerprint. Said composite consists of an array of resistive, temperature-dependent elements, and contains strip conductors which connect the resistive, temperature-dependent elements to at least one connection field located on the substrate, outside the measuring field, and form part of the composite of structured thin films. The substrate also contains at least one microelectronic switching circuit which is electrically connected to the at least one connection field and contains the switching circuits by which means the thin film structures are controlled in order to heat the resistive, temperature-sensitive elements, the resistive, temperature-sensitive elements are read out, and the data is retransmitted.
    • 本发明涉及一种指纹识别模块,其包括由至少在其上侧电绝缘且至少部分热绝缘的材料构成的基板。 所述衬底在其表面上接收结构化薄膜的复合物,其在衬底的表面上直接形成测量场,用于测量指纹。 所述复合材料由电阻温度依赖元件阵列组成,并且包含带状导体,其将电阻性温度依赖元件连接到位于测量场外部的至少一个位于基板上的连接场,并形成部分复合材料 结构薄膜。 衬底还包含至少一个微电子开关电路,其电连接到至少一个连接场,并且包含切换电路,通过该开关电路来控制薄膜结构,以便加热电阻式温度敏感元件,电阻式, 读出温度敏感元件,重发数据。
    • 5. 发明授权
    • Process for manufacturing discrete electronic devices
    • 用于制造分立电子设备的工艺
    • US5933715A
    • 1999-08-03
    • US812293
    • 1997-03-07
    • Gunter IgelRuediger Joachim Stroh
    • Gunter IgelRuediger Joachim Stroh
    • H01L21/329H01L21/78H01L21/84H01L21/331H01L21/311H01L21/44H01L21/8222
    • H01L29/6609H01L21/78H01L21/84H01L29/66136H01L29/66143Y10S438/978
    • A process for manufacturing discrete electronic devices with active structures in an SOI (silicon-on-insulator) substrate which is thickened by an epitaxial layer and whose surface has a orientation, said process comprising the steps of: anisotropically etching the first silicon layer to form a moat having a diameter tapering in the direction of the insulator layer, said moat extending to the insulator layer; forming an insulating layer on the sidewalls of the moat; removing a portion of the insulator layer adjoining the moat to expose a portion of the second silicon layer, which is separated from the first silicon layer by the insulator layer; forming the active structure in the second silicon layer below the portion of the insulator layer which was removed; and depositing a contact layer on the insulating layer and the active element for making contact to the active structure.
    • 一种在SOI(绝缘体上硅)衬底中制造具有有源结构的分立电子器件的方法,其被外延层增厚并且其表面具有<100>取向,所述方法包括以下步骤:各向异性蚀刻第一硅 以形成直径在绝缘体层的方向上逐渐变细的护城河,所述护城河延伸到绝缘体层; 在护城河的侧壁上形成绝缘层; 去除与护城河相邻的绝缘体层的一部分,以暴露由绝缘体层与第一硅层分离的第二硅层的一部分; 在除去的绝缘体层的部分下方的第二硅层中形成有源结构; 以及在所述绝缘层和所述有源元件上沉积接触层以与所述有源结构接触。
    • 7. 发明授权
    • Method of separating electronic elements
    • 分离电子元件的方法
    • US5824595A
    • 1998-10-20
    • US720771
    • 1996-10-03
    • Gunter IgelMartin Mall
    • Gunter IgelMartin Mall
    • B81C99/00H01L21/301H01L21/78H01L21/46
    • H01L21/78Y10S438/977
    • A method for separating elements associated within a body includes creating a separation region within the body, between the elements, leaving a region of the body which is to be thinned. The method then requires depositing a delay layer on the body, with an opening around the separation region. The delay layer has a predetermined removal rate relative to the removal rate of the body. Lastly, the method requires removing a predetermined amount of the delay layer, the separation region, and the region of the body to be thinned. Preferably, the removing is accomplished by etching, such as plasma etching, and the etch rate of the delay layer is lower than the etch rate for the separation region. In a preferred method, the predetermined removal rate and the positions of the openings in the delay layer are selected so that upon after etching, the elements remaining have a predetermined locus dependent thickness. Alternatively, the delay layers may be formed from the base material, formed from a metallic material or made from a silicon dioxide (SiO.sub.2) material. The base material is preferably a semiconductor wafer and the elements are semiconductor based electronic elements.
    • 用于分离在身体内相关联的元件的方法包括在体内,元件之间产生分离区域,留下要被减薄的身体的区域。 该方法然后需要在主体上沉积延迟层,其中围绕分离区域具有开口。 延迟层相对于身体的去除速度具有预定的去除速率。 最后,该方法需要去除预定量的延迟层,分离区域和待稀释的体的区域。 优选地,通过诸如等离子体蚀刻的蚀刻来实现去除,并且延迟层的蚀刻速率低于分离区域的蚀刻速率。 在优选的方法中,选择延迟层中的预定去除速率和开口的位置,使得在蚀刻之后,剩余的元素具有预定的轨迹依赖厚度。 或者,延迟层可以由基材形成,由金属材料形成或由二氧化硅(SiO 2)材料制成。 基材优选为半导体晶片,元件为基于半导体的电子元件。
    • 9. 发明授权
    • Capacitor structure and fabrication process
    • 电容器结构和制造工艺
    • US06460416B1
    • 2002-10-08
    • US09112849
    • 1998-07-10
    • Gunter Igel
    • Gunter Igel
    • G01L912
    • G01L9/0073G01L9/0075
    • The invention relates to a capacitor structure with two substrates (1) each having a capacitor electrode (3) deposited on its surface, the substrates (1) being joined together by bump structures located on both sides of the capacitor electrodes (3) such that the capacitor electrodes (3) lie opposite each other and form a capacitor, the distance d between the capacitor electrodes (3) being defined by the height of the bump structures, and measuring connections (5) being provided on one of the substrates (1) for making capacitance measurements.
    • 本发明涉及具有两个基板(1)的电容器结构,每个基板(1)的表面上沉积有电容器电极(3),基板(1)通过位于电容器电极(3)两侧的凸块结构连接在一起,使得 电容器电极(3)彼此相对并形成电容器,电容器电极(3)之间的距离d由凸块结构的高度限定,并且测量连接(5)设置在一个基板(1)上 )进行电容测量。