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    • 5. 发明授权
    • Time-interleaved band-pass delta-sigma modulator
    • 时间交织的带通Δ-Σ调制器
    • US07145491B2
    • 2006-12-05
    • US10522373
    • 2002-08-29
    • Gun-Hee HanMin-Ho KwonJung-Yoon Lee
    • Gun-Hee HanMin-Ho KwonJung-Yoon Lee
    • H03M1/00
    • H03M3/47H03M3/402H03M3/454
    • A time-interleaved bandpass delta-sigma modulator is developed which includes a first adder and a second adder and a comparator. An input signal is transmitted to the first adder according to the clock frequency of each channel block, and an n channel block output un of the first adder is transmitted to the first adder and the second adder of an n+2 channel block, and an n block output vn of the second adder is transmitted to the second adder of an n+2 block, and an output yn that passes through an n block comparator is transmitted to the first adder and the second adder of an n+2 block. Therefore, a modulator sequentially receives output from the comparator of each block for generating the final output y.
    • 开发了一种时间交织的带通Δ-Σ调制器,其包括第一加法器和第二加法器以及比较器。 根据每个通道块的时钟频率将输入信号发送到第一加法器,并且第一加法器的n个通道块输出u N n被发送到第一加法器,第二加法器 n + 2个通道块和第n个加法器的n个块输出端子n n n被发送到n + 2个块的第二加法器,并且输出y n n 通过n块比较器被传送到第n + 2块的第一加法器和第二加法器。 因此,调制器顺序地从每个块的比较器接收用于产生最终输出y的输出。
    • 6. 发明申请
    • Time-interleaved band-pass delta-sigma modulator
    • 时间交织的带通Δ-Σ调制器
    • US20050231407A1
    • 2005-10-20
    • US10522373
    • 2002-08-29
    • Gun-Hee HanMin-Ho KwonJung-Yoon Lee
    • Gun-Hee HanMin-Ho KwonJung-Yoon Lee
    • H03M3/00H03M1/00
    • H03M3/47H03M3/402H03M3/454
    • A time-interleaved bandpass delta-sigma modulator is developed which includes a first adder and a second adder and a comparator. An input signal is transmitted to the first adder according to the clock frequency of each channel block, and an n channel block output un of the first adder is transmitted to the first adder and the second adder of an n+2 channel block, and an n block output vn of the second adder is transmitted to the second adder of an n+2 block, and an output yn that passes through an n block comparator is transmitted to the first adder and the second adder of an n+2 block. Therefore, a modulator sequentially receives output from the comparator of each block for generating the final output y.
    • 开发了一种时间交织的带通Δ-Σ调制器,其包括第一加法器和第二加法器以及比较器。 根据每个通道块的时钟频率将输入信号发送到第一加法器,并且第一加法器的n个通道块输出u N n被发送到第一加法器,第二加法器 n + 2个通道块和第n个加法器的n个块输出端子n n n被发送到n + 2个块的第二加法器,并且输出y n n 通过n块比较器被传送到第n + 2块的第一加法器和第二加法器。 因此,调制器顺序地从每个块的比较器接收用于产生最终输出y的输出。
    • 9. 发明授权
    • Correlated double-sampling circuit and cyclic analog-to-digital converter including the same
    • 相关双采样电路和包括相同的循环模数转换器
    • US07535398B2
    • 2009-05-19
    • US11872850
    • 2007-10-16
    • Seung-Hyun LimJeong-Hwan LeeGun-Hee HanSeog-Hoon Ham
    • Seung-Hyun LimJeong-Hwan LeeGun-Hee HanSeog-Hoon Ham
    • H03M1/12
    • H03M1/1245H03M1/403H04N5/3575
    • An analog-to-digital converter (ADC) includes first and second circuits, a differential amplifier, a comparator and a digital-to-analog converter (DAC). The first circuit samples a reset voltage, amplifies the sampled reset voltage, and subtracts a first reference voltage from the amplified reset voltage to produce a first difference. The second circuit samples a signal voltage, amplifies the sampled signal voltage, and subtracts a second reference voltage from the amplified signal voltage to produce a second difference. The differential amplifier produces a third difference based a comparison of the first and second differences from the first and second circuits. The comparator compares an output of the differential amplifier with at least one predetermined comparison voltage and outputs a comparison result as a digital value. The DAC is connected to the first and second circuits and the comparator, and controls the first and second reference voltages in response to the digital value.
    • 模数转换器(ADC)包括第一和第二电路,差分放大器,比较器和数模转换器(DAC)。 第一电路对复位电压进行采样,放大采样的复位电压,并从放大的复位电压中减去第一个参考电压以产生第一个差值。 第二电路对信号电压进行采样,放大采样信号电压,并从放大的信号电压中减去第二参考电压以产生第二差值。 基于与第一和第二电路的第一和第二差异的比较,差分放大器产生第三差。 比较器将差分放大器的输出与至少一个预定的比较电压进行比较,并将比较结果作为数字值输出。 DAC连接到第一和第二电路和比较器,并且响应于数字值来控制第一和第二参考电压。