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1. 发明授权

US07884640B2 PLD providing soft wakeup logic 有权
标题翻译： PLD提供软唤醒逻辑
公开(公告)号：US07884640B2
公开(公告)日：2011-02-08
申请号：US12340358
申请日：2008-12-19
申请人： Jonathan W Greene , Gregory Bakker , Vidyadhara Bellippady , Volker Hecht , Theodore Speers
发明人： Jonathan W Greene , Gregory Bakker , Vidyadhara Bellippady , Volker Hecht , Theodore Speers
IPC分类号： H03K19/173
CPC分类号： H03K19/17784
摘要： A programmable logic device (PLD) with a plurality of programmable regions is disclosed. Some of the programmable regions have switch power or ground supplies to allow them to be put into a low-power state in one or more low-power modes. At least one of the programmable regions always remains on during the low-power modes to enable the user to design custom PLD power management logic that may be placed in the always-on programmable region.
摘要翻译：公开了具有多个可编程区域的可编程逻辑器件（PLD）。一些可编程区域具有开关电源或接地电源，以允许它们在一个或多个低功率模式下进入低功率状态。在低功率模式期间，至少一个可编程区域始终保持接通状态，以使用户能够设计定制的PLD功率管理逻辑，该逻辑可以放置在永久可编程区域中。

2. 发明授权

US07560952B2 Integrated circuit device having state-saving and initialization feature 有权
标题翻译：具有省电和初始化功能的集成电路装置
公开(公告)号：US07560952B2
公开(公告)日：2009-07-14
申请号：US12028615
申请日：2008-02-08
申请人： Limin Zhu , Theodore Speers , Gregory Bakker
发明人： Limin Zhu , Theodore Speers , Gregory Bakker
IPC分类号： H03K19/173
CPC分类号： H03K19/1776 , G01K7/015 , G06F1/08 , G06F1/28 , G06F1/30 , G06F15/7842 , G06F15/7867 , H03F3/45475 , H03F2203/45136 , H03F2203/45166 , H03K17/223 , H03K19/177 , H03K19/17732
摘要： An integrated circuit device has a state-saving feature and includes a programmable logic block, I/O pads, a dedicated register, at least one volatile memory block, a non-volatile memory block, a condition-sensing circuit for detecting at least one condition, A control circuit such as a state machine controls the saving of states of various volatile memories and registers to the non-volatile memory and also controls the initialization of the volatile registers and memories using the saved state data.
摘要翻译：集成电路装置具有省电特征，并且包括可编程逻辑块，I / O焊盘，专用寄存器，至少一个易失性存储器块，非易失性存储器块，用于检测至少一个条件，诸如状态机的控制电路控制各种易失性存储器和寄存器的状态的保存到非易失性存储器，并且还使用保存的状态数据来控制易失性寄存器和存储器的初始化。

3. 发明授权

US07492183B2 Programmable system on a chip for power-supply voltage and current monitoring and control 有权
公开(公告)号：US07492183B2
公开(公告)日：2009-02-17
申请号：US11932710
申请日：2007-10-31
申请人： Rabindranth Balasubramanian , Gregory Bakker
发明人： Rabindranth Balasubramanian , Gregory Bakker
IPC分类号： G06F7/38 , G06F1/26
CPC分类号： H03K19/1776 , G01K7/015 , G06F1/08 , G06F1/28 , G06F1/30 , G06F15/7842 , G06F15/7867 , H03F3/45475 , H03F2203/45136 , H03F2203/45166 , H03K17/223 , H03K19/177 , H03K19/17732
摘要： A programmable system-on-a-chip integrated circuit device includes a programmable logic block, at least one user non-volatile memory block, and voltage-measuring and control analog and digital circuits on a single semiconductor integrated circuit chip or a flip chip, face-to-face, or other multiple die configuration. The programmable system-on-a-chip integrated circuit with voltage-measuring, current-measuring and control circuitry performs voltage measurement and control functions and can be used to control and monitor external power supplies connected to external loads.

4. 发明授权

US07492182B2 Non-volatile look-up table for an FPGA 有权
公开(公告)号：US07492182B2
公开(公告)日：2009-02-17
申请号：US11858322
申请日：2007-09-20
申请人： John McCollum , Gregory Bakker , Jonathan Greene
发明人： John McCollum , Gregory Bakker , Jonathan Greene
IPC分类号： G06F7/38 , H03K19/173
CPC分类号： H03K19/17728
摘要： A non-volatile-memory-transistor based lookup table for an FPGA includes a n:1 multiplexer. A non-volatile memory transistor is coupled to each of the n inputs of the multiplexer. The multiplexer has x address inputs wherein 2x=n as is known in the art. The output of the multiplexer is coupled to VCC through a pullup transistor. The gate of the pullup transistor is coupled to the output of an address transition detector circuit that has inputs coupled to the address inputs of the multiplexer. A sense amplifier is coupled to the output of the multiplexer.

5. 发明申请

US20080279028A1 FLASH/DYNAMIC RANDOM ACCESS MEMORY FIELD PROGRAMMABLE GATE ARRAY 审中-公开
标题翻译：闪存/动态随机存取现场可编程门阵列
公开(公告)号：US20080279028A1
公开(公告)日：2008-11-13
申请号：US12181969
申请日：2008-07-29
申请人： John McCollum , Vidya Bellippady , Gregory Bakker
发明人： John McCollum , Vidya Bellippady , Gregory Bakker
IPC分类号： G11C7/00
CPC分类号： G11C11/406
摘要： A circuit for selectively interconnecting two nodes in an integrated circuit device includes a memory array having a plurality of wordlines and a plurality of bitlines. A refresh transistor has a source coupled to one of the plurality of bitlines, a control gate coupled to a dynamic random access memory wordline and a drain. A switching transistor has a gate coupled to the drain of the refresh transistor, a source coupled to a first one of the nodes and a drain coupled to a second one of the nodes. An address decoder for supplies periodic signals to the wordlines and the dynamic random access memory wordline.
摘要翻译：用于选择性地互连集成电路器件中的两个节点的电路包括具有多个字线和多个位线的存储器阵列。刷新晶体管具有耦合到多个位线之一的源极，耦合到动态随机存取存储器字线和漏极的控制栅极。开关晶体管具有耦合到刷新晶体管的漏极的栅极，耦合到节点中的第一节点的源极和耦合到节点中的第二节点的漏极。地址解码器，用于向字线和动态随机存取存储器字线提供周期性信号。

6. 发明授权

US07446378B2 ESD protection structure for I/O pad subject to both positive and negative voltages 有权
标题翻译： I / O焊盘的ESD保护结构受到正和负电压的影响
公开(公告)号：US07446378B2
公开(公告)日：2008-11-04
申请号：US11027788
申请日：2004-12-29
申请人： Gregory Bakker
发明人： Gregory Bakker
IPC分类号： H01L23/62
CPC分类号： H01L27/0266
摘要： An ESD protection circuit is disclosed for an n-channel MOS transistor formed in an inner p-well of a triple-well process and connected to an I/O pad that may experience both positive and negative voltages according to the present invention. A first switch connects the p-well containing the n-channel MOS transistor to ground if the voltage at the I/O pad is positive and a second switch connects the p-well containing the n-channel MOS transistor to the I/O pad if the voltage at the I/O pad is negative. A third switch connects the gate of the n-channel MOS transistor to the p-well if it is turned off and a fourth switch connects the gate of the n-channel MOS transistor to VCC if it is turned on.
摘要翻译：公开了一种ESD保护电路，用于形成在三阱工艺的内部p阱中的n沟道MOS晶体管，并连接到根据本发明可以经历正和负电压的I / O焊盘。如果I / O焊盘的电压为正，则第一开关将包含n沟道MOS晶体管的p阱连接到地，而第二开关将包含n沟道MOS晶体管的p阱连接到I / O焊盘如果I / O焊盘的电压为负。第三开关将n沟道MOS晶体管的栅极连接到p阱，如果它是截止的，第四个开关将n沟道MOS晶体管的栅极连接到V CC CC 打开。

7. 发明授权

US07385418B2 Non-volatile memory architecture for programmable-logic-based system on a chip 有权
标题翻译：非易失性存储器架构，用于芯片上的可编程逻辑系统
公开(公告)号：US07385418B2
公开(公告)日：2008-06-10
申请号：US11460055
申请日：2006-07-26
申请人： Theodore Speers , Limin Zhu , Kurt Kolkind , Gregory Bakker
发明人： Theodore Speers , Limin Zhu , Kurt Kolkind , Gregory Bakker
IPC分类号： H03K19/177 , G06K13/00 , G06K11/00
CPC分类号： H03K19/1776 , G01K7/015 , G06F1/08 , G06F1/28 , G06F1/30 , G06F15/7842 , G06F15/7867 , H03F3/45475 , H03F2203/45136 , H03F2203/45166 , H03K17/223 , H03K19/177 , H03K19/17732
摘要： A programmable system-on-a-chip integrated circuit device includes a programmable logic block. A digital input/output circuit block is coupled to the programmable logic block. A SRAM block is coupled to the programmable logic block. At least one non-volatile memory block is coupled to the programmable logic block. A JTAG port is coupled to the programmable logic block. An analog circuit block including an analog-to-digital converter may be coupled to the programmable logic block and an analog input/output circuit block may be coupled to the analog circuit block.
摘要翻译：可编程片上系统集成电路器件包括可编程逻辑块。数字输入/输出电路块耦合到可编程逻辑块。 SRAM块耦合到可编程逻辑块。至少一个非易失性存储器块耦合到可编程逻辑块。 JTAG端口耦合到可编程逻辑块。包括模拟 - 数字转换器的模拟电路块可以耦合到可编程逻辑块，并且模拟输入/输出电路块可以耦合到模拟电路块。

8. 发明授权

US07365565B2 Programmable system on a chip for power-supply voltage and current monitoring and control 有权
标题翻译：芯片上的可编程系统，用于电源电压和电流监控
公开(公告)号：US07365565B2
公开(公告)日：2008-04-29
申请号：US11345549
申请日：2006-01-31
申请人： Rabindranath Balasubramanian , Gregory Bakker
发明人： Rabindranath Balasubramanian , Gregory Bakker
IPC分类号： H03K19/173
CPC分类号： H03K19/1776 , G01K7/015 , G06F1/08 , G06F1/28 , G06F1/30 , G06F15/7842 , G06F15/7867 , H03F3/45475 , H03F2203/45136 , H03F2203/45166 , H03K17/223 , H03K19/177 , H03K19/17732
摘要： A programmable system-on-a-chip integrated circuit device includes a programmable logic block, at least one user non-volatile memory block, and voltage-measuring and control analog and digital circuits on a single semiconductor integrated circuit chip or a flip chip, face-to-face, or other multiple die configuration. The programmable system-on-a-chip integrated circuit with voltage-measuring, current-measuring and control circuitry performs voltage measurement and control functions and can be used to control and monitor external power supplies connected to external loads.
摘要翻译：可编程片上系统芯片集成电路器件包括可编程逻辑块，至少一个用户非易失性存储器块，以及在单个半导体集成电路芯片或倒装芯片上的电压测量和控制模拟和数字电路，面对面或其他多芯片配置。具有电压测量，电流测量和控制电路的可编程片上系统芯片集成电路执行电压测量和控制功能，可用于控制和监控连接到外部负载的外部电源。

9. 发明授权

US07352206B1 Integrated circuit device having state-saving and initialization feature 有权
标题翻译：具有省电和初始化功能的集成电路装置
公开(公告)号：US07352206B1
公开(公告)日：2008-04-01
申请号：US10857472
申请日：2004-05-28
申请人： Limin Zhu , Theodore Speers , Gregory Bakker
发明人： Limin Zhu , Theodore Speers , Gregory Bakker
IPC分类号： H03K19/173
CPC分类号： H03K19/1776 , G01K7/015 , G06F1/08 , G06F1/28 , G06F1/30 , G06F15/7842 , G06F15/7867 , H03F3/45475 , H03F2203/45136 , H03F2203/45166 , H03K17/223 , H03K19/177 , H03K19/17732
摘要： An integrated circuit device has a state-saving feature and includes a programmable logic block, I/O pads, a dedicated register, at least one volatile memory block, a non-volatile memory block, a condition-sensing circuit for detecting at least one condition, A control circuit such as a state machine controls the saving of states of various volatile memories and registers to the non-volatile memory and also controls the initialization of the volatile registers and memories using the saved state data.
摘要翻译：集成电路装置具有省电特征，并且包括可编程逻辑块，I / O焊盘，专用寄存器，至少一个易失性存储器块，非易失性存储器块，用于检测至少一个条件，诸如状态机的控制电路控制各种易失性存储器和寄存器的状态的保存到非易失性存储器，并且还使用保存的状态数据来控制易失性寄存器和存储器的初始化。

10. 发明申请

US20080048715A1 PROGRAMMABLE SYSTEM ON A CHIP FOR POWER-SUPPLY VOLTAGE AND CURRENT MONITORING AND CONTROL 有权
公开(公告)号：US20080048715A1
公开(公告)日：2008-02-28
申请号：US11932710
申请日：2007-10-31
申请人： Rabindranth Balasubramanian , Gregory Bakker
发明人： Rabindranth Balasubramanian , Gregory Bakker
IPC分类号： H03K19/173
CPC分类号： H03K19/1776 , G01K7/015 , G06F1/08 , G06F1/28 , G06F1/30 , G06F15/7842 , G06F15/7867 , H03F3/45475 , H03F2203/45136 , H03F2203/45166 , H03K17/223 , H03K19/177 , H03K19/17732
摘要： A programmable system-on-a-chip integrated circuit device includes a programmable logic block, at least one user non-volatile memory block, and voltage-measuring and control analog and digital circuits on a single semiconductor integrated circuit chip or a flip chip, face-to-face, or other multiple die configuration. The programmable system-on-a-chip integrated circuit with voltage-measuring, current-measuring and control circuitry performs voltage measurement and control functions and can be used to control and monitor external power supplies connected to external loads.

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