专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08421663B1 Analog-to-digital converter comprising dual oscillators for linearity compensation 有权
标题翻译：模数转换器包括用于线性补偿的双振荡器
公开(公告)号：US08421663B1
公开(公告)日：2013-04-16
申请号：US13027557
申请日：2011-02-15
申请人： George J. Bennett
发明人： George J. Bennett
IPC分类号： H03M1/12
CPC分类号： H03M1/0678 , H03M1/0612 , H03M1/60
摘要： An analog-to-digital converter (ADC) is disclosed operable to convert a sensor signal to a digital value. A differential amplifier responsive to the sensor signal and a reference signal generates a first analog signal representing a first offset above the reference signal and a second analog signal representing a second offset below the reference signal. A first oscillator generates a first output frequency dependent on the first analog signal, and a second oscillator generates a second output frequency dependent on the second analog signal. A difference between the first output frequency and the second output frequency is generated, and the digital value representing the sensor signal is generated in response to the difference.
摘要翻译：公开了一种用于将传感器信号转换为数字值的模拟 - 数字转换器（ADC）。响应于传感器信号和参考信号的差分放大器产生表示参考信号之上的第一偏移的第一模拟信号和表示在参考信号之下的第二偏移的第二模拟信号。第一振荡器产生取决于第一模拟信号的第一输出频率，并且第二振荡器产生取决于第二模拟信号的第二输出频率。产生第一输出频率和第二输出频率之间的差异，并且响应于该差异产生表示传感器信号的数字值。

2. 发明授权

US08134793B1 Methods and systems for fast release of data from a host by a disk drive 有权
标题翻译：由磁盘驱动器从主机快速释放数据的方法和系统
公开(公告)号：US08134793B1
公开(公告)日：2012-03-13
申请号：US12818085
申请日：2010-06-17
申请人： Steven R. Vasquez , George J. Bennett
发明人： Steven R. Vasquez , George J. Bennett
IPC分类号： G11B5/09
CPC分类号： G11B5/59688 , G11B5/59655
摘要： A disk drive comprising a disk, a head actuated over the disk, a read/write channel, a control processor, and a servo system is disclosed. The servo system is configured to read servo information from a servo wedge on the disk via the read/write channel, to generate first and second status information based on the read servo information, to output the first and second status information to the control processor, and to output first and second interrupt signals to the control processor, the first and second interrupt signals being spaced apart by a time delay. In response to the first interrupt signal, the control processor is configured to determine whether to release data from a host based on the first status information, and in response to the second interrupt signal, the control processor is configured to determine whether to release data from the host based on the second status information.
摘要翻译：公开了一种盘驱动器，包括盘，在盘上致动的头，读/写通道，控制处理器和伺服系统。伺服系统被配置为经由读/写通道从盘上的伺服楔读取伺服信息，以便根据读取的伺服信息产生第一和第二状态信息，以将第一和第二状态信息输出到控制处理器，并且将第一和第二中断信号输出到控制处理器，第一和第二中断信号间隔开时间延迟。响应于第一中断信号，控制处理器被配置为基于第一状态信息来确定是否从主机释放数据，并且响应于第二中断信号，控制处理器被配置为确定是否从主机基于第二状态信息。

3. 发明授权

US07697233B1 Disk drive comprising a servo accelerator implementing state space equations for a plurality of task objects 失效
标题翻译：磁盘驱动器包括对多个任务对象执行状态空间方程的伺服加速器
公开(公告)号：US07697233B1
公开(公告)日：2010-04-13
申请号：US12255542
申请日：2008-10-21
申请人： George J. Bennett , Orhan Beker , Aswartha Narayana
发明人： George J. Bennett , Orhan Beker , Aswartha Narayana
IPC分类号： G11B21/02 , G11B5/55 , G11B5/596
CPC分类号： G11B5/5547 , G11B5/59605
摘要： A disk drive is disclosed comprising a disk, a head, and an actuator for actuating the head over the disk. The disk drive further comprises a state variable memory for storing a plurality of state variable sets, wherein each state variable set comprises a plurality of state variables and each state variable set corresponds to a task object. A coefficient memory for stores a plurality of coefficient sets, wherein each coefficient set comprises a plurality of coefficients and each coefficient set corresponds to a task object. A task object is executed by initializing a base state register to address a selected one of the state variable sets in the state variable memory, and initializing a base coefficient register to address a selected one of the coefficient sets in the coefficient memory.
摘要翻译：公开了一种磁盘驱动器，其包括用于在盘上致动磁头的磁盘，磁头和致动器。磁盘驱动器还包括用于存储多个状态变量集合的状态变量存储器，其中每个状态变量集合包括多个状态变量，并且每个状态变量集对应于任务对象。一种用于存储多个系数组的系数存储器，其中每个系数组包括多个系数，并且每个系数组对应于任务对象。通过初始化基本状态寄存器来对状态变量存储器中的状态变量集合中的一个选择的一个进行初始化，并且初始化基本系数寄存器以对系数存储器中的所选择的一个系数集进行寻址来执行任务对象。

4. 发明授权

US07619844B1 Disk drive comprising a mechanical position sensor to prevent a runaway condition 失效
标题翻译：磁盘驱动器包括机械位置传感器以防止失控状况
公开(公告)号：US07619844B1
公开(公告)日：2009-11-17
申请号：US11322908
申请日：2005-12-30
申请人： George J. Bennett
发明人： George J. Bennett
IPC分类号： G11B21/02
CPC分类号： G11B5/5547
摘要： A disk drive is disclosed including a disk having a plurality of servo sectors that define a plurality of servo tracks, an actuator arm, a head attached to a distal end of the actuator arm, a mechanical position sensor operable to detect an estimated position of the actuator arm, and a voice coil motor for rotating the actuator arm about a pivot. The disk drive further comprises control circuitry operable to process the servo sectors to generate a control signal applied to the voice coil motor, detect an estimated velocity of the actuator arm, detect a runaway condition in response to the estimated position of the actuator arm and the estimated velocity of the actuator arm, and adjust the control signal applied to the voice coil motor if the runaway condition is detected.
摘要翻译：公开了一种磁盘驱动器，包括具有限定多个伺服磁道的多个伺服扇区的磁盘，致动器臂，附接到致动器臂的远端的磁头，可操作以检测所述驱动臂的估计位置的机械位置传感器致动器臂和用于围绕枢轴旋转致动器臂的音圈电机。磁盘驱动器还包括控制电路，其可操作以处理伺服扇区以产生施加到音圈电机的控制信号，检测致动器臂的估计速度，响应于致动器臂的估计位置检测失控状况，以及如果检测到失控状况，则调节执行器臂的估计速度，并调整施加到音圈电机的控制信号。

5. 发明授权

US07480116B1 Disk drive employing coarse position feedback from mechanical position sensor to improve format efficiency 有权
标题翻译：磁盘驱动器采用来自机械位置传感器的粗略位置反馈来提高格式效率
公开(公告)号：US07480116B1
公开(公告)日：2009-01-20
申请号：US11336316
申请日：2006-01-20
申请人： George J. Bennett
发明人： George J. Bennett
IPC分类号： G11B5/596
CPC分类号： G11B5/5552
摘要： A disk drive is disclosed including a disk having a plurality of servo tracks. The servo tracks are banded together to form a plurality of servo track bands, and each servo sector comprises a fine track address that identifies one of the servo tracks. The disk drive further comprises a head attached to a distal end of an actuator arm operable to generate a read signal by reading the disk, and a mechanical position sensor operable to detect a coarse position of the actuator arm. The coarse position is processed to identify one of the servo track bands, and the read signal is processed to detect one of the fine track addresses, wherein the detected fine track address identifies a servo track within the identified servo track band. The identified servo track band is combined with the detected fine track address to generate a servo track address.
摘要翻译：公开了一种包括具有多个伺服磁道的磁盘的磁盘驱动器。伺服磁道被捆绑在一起以形成多个伺服磁道带，并且每个伺服扇区包括标识伺服磁道之一的精细磁道地址。磁盘驱动器还包括附接到致动器臂的远端的头部，其可操作以通过读取盘来产生读取信号;以及机械位置传感器，其可操作以检测致动器臂的粗略位置。处理粗略位置以识别伺服轨道带中的一个，并且处理读取信号以检测精细轨道地址之一，其中所检测的精细轨道地址识别所识别的伺服轨道带内的伺服轨迹。所识别的伺服轨道频带与检测到的精细轨道地址组合以产生伺服轨迹地址。

6. 发明授权

US07330019B1 Adjusting on-time for a discontinuous switching voltage regulator 有权
标题翻译：调整不连续开关电压调节器的导通时间
公开(公告)号：US07330019B1
公开(公告)日：2008-02-12
申请号：US11590704
申请日：2006-10-31
申请人： George J. Bennett
发明人： George J. Bennett
IPC分类号： G05F1/575 , G05F1/56
CPC分类号： H02M3/157 , H02M3/156
摘要： A discontinuous switching voltage regulator is disclosed including a charging element operable to generate an output voltage, switching circuitry coupled to the charging element, and switch control circuitry to configure the charging element during a cycle, including to charge the charging element for an on-time, discharge the charging element for a discharge time, and tristate the charging element for a tristate time. In operation, the on-time is initialized to a first on-time, and a first switch time is measured comprising the first on-time and a first discharge time of a first cycle. A first tristate time of the first cycle is measured, and a first ratio of the first tristate time to the first switch time is determined. The first ratio is compared to a first ratio threshold, and the on-time is adjusted to a second on-time if the first ratio exceeds the first ratio threshold.
摘要翻译：公开了一种不连续的开关电压调节器，其包括可操作以产生输出电压的充电元件，耦合到充电元件的开关电路，以及开关控制电路，用于在一个周期期间配置充电元件，包括为充电元件充电，放电充电元件放电时间，并将充电元件三态三态时间。在操作中，将导通时间初始化为第一导通时间，并且测量包括第一周期的第一导通时间和第一放电时间的第一开关时间。测量第一周期的第一三态时间，并且确定第一三态时间与第一切换时间的第一比率。将第一比率与第一比率阈值进行比较，并且如果第一比率超过第一比率阈值，则导通时间被调整为第二导通时间。

7. 发明授权

US07215504B1 Disk drive using an optical sensor to detect a position of an actuator arm 有权
标题翻译：使用光学传感器检测致动器臂的位置的磁盘驱动器
公开(公告)号：US07215504B1
公开(公告)日：2007-05-08
申请号：US11253400
申请日：2005-10-19
申请人： George J. Bennett
发明人： George J. Bennett
IPC分类号： G11B5/596
CPC分类号： G11B5/5569
摘要： A disk drive is disclosed comprising a disk, an actuator arm, a head coupled to the actuator arm, a base, and an optical sensor operable to detect a position of the actuator arm. The optical sensor comprises a light source that is stationary relative to the base, a plurality of light sensitive sensors positioned to receive light from the light source, and a substantially opaque element positioned between the light source and the light sensitive sensors configured to control an amount of light at least one of the plurality of light sensitive sensors detects relative to the position of the actuator arm.
摘要翻译：公开了一种磁盘驱动器，其包括盘，致动器臂，联接到致动器臂的头，基座和可操作以检测致动器臂的位置的光学传感器。光学传感器包括相对于基座静止的光源，定位成接收来自光源的光的多个光敏传感器，以及位于光源和感光传感器之间的基本上不透明的元件，其被配置为控制量所述多个光敏传感器中的至少一个相对于所述致动器臂的位置检测。

8. 发明授权

US07209321B1 Disk drive pulse width modulating a voice coil motor using model reference current feedback 有权
标题翻译：磁盘驱动器使用模型参考电流反馈来调制音圈电机
公开(公告)号：US07209321B1
公开(公告)日：2007-04-24
申请号：US10633095
申请日：2003-07-31
申请人： George J. Bennett
发明人： George J. Bennett
IPC分类号： G11B5/596
CPC分类号： G11B5/59605 , G11B5/5547
摘要： A disk drive is disclosed comprising a voice coil motor (VCM) driven in a PWM mode using model reference current feedback. The PWM circuitry and VCM form a plant transfer function which varies with changes to the plant characteristics, such as the resistance of the voice coil fluctuating with temperature drift. A plant model having a model transfer function generates an estimated state of the VCM in response to a detected current flowing through the voice coil. A correction block, responsive to the detected current, adjusts PWM timing signals so that the plant transfer function substantially matches the model transfer function.
摘要翻译：公开了一种磁盘驱动器，其包括使用模型参考电流反馈以PWM模式驱动的音圈电机（VCM）。 PWM电路和VCM形成植物传递函数，随着植物特性的变化而变化，例如音调随着温度漂移而波动的电阻。具有模型传递函数的植物模型响应于流过音圈的检测电流产生VCM的估计状态。响应于检测到的电流的校正块调整PWM定时信号，使得植物传递函数基本上符合模型传递函数。

9. 发明授权

US07205805B1 Adjusting power consumption of digital circuitry relative to critical path circuit having the largest propagation delay error 有权
标题翻译：调整数字电路相对于具有最大传播延迟误差的关键路径电路的功耗
公开(公告)号：US07205805B1
公开(公告)日：2007-04-17
申请号：US10980676
申请日：2004-11-02
申请人： George J. Bennett
发明人： George J. Bennett
IPC分类号： H03L7/06
CPC分类号： H03L7/085 , G06F1/3203 , G06F1/324 , G06F1/3296 , H03L7/0805 , H03L7/087 , H03L7/0995 , Y02D10/126 , Y02D10/172
摘要： A method and apparatus is disclosed for adjusting at least one of a supply voltage and a clocking frequency applied to digital circuitry of a computing device, wherein the digital circuitry comprises a plurality of critical path circuits and a corresponding plurality of propagation delay error circuits. Each propagation delay error circuit generates a propagation delay error signal representing an error in propagation delay for the corresponding critical path circuit. The computing device further comprises a voting circuit for comparing the propagation delay error signals in order to select the largest propagation delay error signal for use in adjusting the at least one of the supply voltage and clocking frequency.
摘要翻译：公开了一种用于调整施加到计算设备的数字电路的电源电压和时钟频率中的至少一个的方法和装置，其中数字电路包括多个关键路径电路和相应的多个传播延迟误差电路。每个传播延迟误差电路产生表示对应关键路径电路的传播延迟误差的传播延迟误差信号。计算装置还包括一个投票电路，用于比较传播延迟误差信号，以便选择用于调整电源电压和时钟频率中的至少一个的最大传播延迟误差信号。

10. 发明授权

US07129763B1 Adjusting power consumption of digital circuitry by generating frequency error representing error in propagation delay 有权
标题翻译：通过产生表示传播延迟误差的频率误差来调整数字电路的功耗
公开(公告)号：US07129763B1
公开(公告)日：2006-10-31
申请号：US10983382
申请日：2004-11-08
申请人： George J. Bennett , Steven R. Vasquez
发明人： George J. Bennett , Steven R. Vasquez
IPC分类号： H03L7/06 , H03L7/00
CPC分类号： H03L7/085 , G06F1/3203 , G06F1/324 , G06F1/3296 , H03L7/0805 , H03L7/0995 , Y02D10/126 , Y02D10/172
摘要： A method and apparatus is disclosed for adjusting at least one of a supply voltage and a clocking frequency applied to digital circuitry of a computing device, wherein the digital circuitry comprises a critical path circuit. A propagation delay frequency representing a propagation delay of the critical path circuit is generated, and a frequency error signal is generated representing a difference between a reference frequency and the propagation delay frequency. At least one of the supply voltage and the clocking frequency is adjusted in response to the frequency error signal.
摘要翻译：公开了一种用于调整施加到计算设备的数字电路的电源电压和时钟频率中的至少一个的方法和装置，其中数字电路包括关键路径电路。产生表示关键路径电路的传播延迟的传播延迟频率，产生表示基准频率与传播延迟频率之间的差的频率误差信号。电源电压和时钟频率中的至少一个响应于频率误差信号被调整。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式